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Custom IC Design

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  • Discussion

    Is it possible to do transient simulation with and without transient noise in one go?

    Category: Custom IC Design

    By delgsy

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    updated over 2 years ago by delgsy

    4 replies • 7445 views
  • Discussion

    ViVA : Save image issue

    Category: Custom IC Design

    By StephanWeber

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    updated over 2 years ago by StephanWeber

    2 replies • 7455 views
  • Discussion

    Assembler MC: When is combine button available?

    Category: Custom IC Design

    By StephanWeber

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    updated over 2 years ago by StephanWeber

    2 replies • 6567 views
  • Discussion

    How to display dc simulation result of bus as decimal number

    Category: Custom IC Design

    By IKIF

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    •

    updated over 2 years ago by ShawnLogan

    5 replies • 9230 views
  • Discussion

    Run plan: Can I edit Design Variable setting?

    Category: Custom IC Design

    By StephanWeber

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    •

    updated over 2 years ago by Andrew Beckett

    1 replies • 6656 views
  • Discussion

    Analog Lib Switch

    Category: Custom IC Design

    By IEEE

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    •

    updated over 2 years ago by Andrew Beckett

    2 replies • 9416 views
  • Discussion

    check instance binding layout Vs Schematic

    Category: Custom IC Design

    By jaapvds

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    •

    updated over 2 years ago by Andrew Beckett

    4 replies • 7966 views
  • Discussion

    What is currently the most straight-forward way to retrieve the metadata of a simulation

    Category: Custom IC Design

    By ExcaIibur

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    updated over 2 years ago by Andrew Beckett

    1 replies • 7039 views
  • Discussion

    Minimum realizable capacitance in UMC180nm Technology

    Category: Custom IC Design

    By Shankaranarayana

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    updated over 2 years ago by Andrew Beckett

    1 replies • 6531 views
  • Discussion

    spectre: save all currents connected to a given node, but exclude given connections

    Category: Custom IC Design

    By Zol

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    updated over 2 years ago by Andrew Beckett

    3 replies • 8512 views
  • Discussion

    save ahdl variable option

    Category: Custom IC Design

    By sjwprcker

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    •

    updated over 2 years ago by Andrew Beckett

    1 replies • 7310 views
  • Discussion

    How to insert a probe for stb analysis without disturbing LVS?

    Category: Custom IC Design

    By StephanWeber

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    •

    updated over 2 years ago by drdanmc

    7 replies • 11395 views
  • Discussion

    Measurements across montecarlo

    Category: Custom IC Design

    By sandrone

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    •

    started over 2 years ago

    0 replies • 6352 views
  • Discussion

    ERROR: Simualtion issue on EMX

    Category: Custom IC Design

    By Upendra Ch

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    •

    updated over 2 years ago by Andrew Beckett

    3 replies • 10400 views
  • Discussion

    "ERROR`` in cadence license (The desired vendor daemon is down)

    Category: Custom IC Design

    By Upendra Ch

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    •

    updated over 2 years ago by Upendra Ch

    2 replies • 3787 views
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