Custom IC Design

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Assura LVS errors

Category: Custom IC Design

By RFStuff

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updated over 11 years ago by Andrew Beckett

1 replies • 13732 views
Discussion

AbstractBlockageCoverLayers on not flatten memory instance

Category: Custom IC Design

By samung

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updated over 11 years ago by samung

5 replies • 14882 views
Discussion

Decoder Cadence ADE Simulation problem

Category: Custom IC Design

By rajrevanth61

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updated over 11 years ago by Andrew Beckett

1 replies • 20392 views
Discussion

Abstract Generator : Memory instance ABSTRACT&LEF views Generation.

Category: Custom IC Design

By samung

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updated over 11 years ago by samung

3 replies • 2427 views
Discussion

Rearranging global variables in ADE-XL

Category: Custom IC Design

By cdpatel

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updated over 11 years ago by cdpatel

2 replies • 13974 views
Discussion

Dynamic resistance of Poly resistor

Category: Custom IC Design

By Shrikirshna

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updated over 11 years ago by FormerMember

1 replies • 14235 views
Discussion

Complete procfile/p2lvsfile syntax

Category: Custom IC Design

By ggupta85

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updated over 11 years ago by Andrew Beckett

1 replies • 1884 views
Discussion

where to get model files for TSMC 0.18u CMOS018/DEEP (6M, HV FET, sblock)

Category: Custom IC Design

By rajrevanth61

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updated over 11 years ago by Andrew Beckett

3 replies • 3012 views
Discussion

Help with spectre stimulus file for sram read.

Category: Custom IC Design

By rajrevanth61

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updated over 11 years ago by Andrew Beckett

4 replies • 16596 views
Discussion

Including HDL Libraries in Virtuoso 6.1.4

Category: Custom IC Design

By Mengisteab

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updated over 11 years ago by Mengisteab

2 replies • 17255 views
Discussion

Can't start up "Virtuoso Documentation" window

Category: Custom IC Design

By DesmondLiu

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updated over 11 years ago by DesmondLiu

1 replies • 1126 views
Discussion

How to change the template of MPP in Properties form?

Category: Custom IC Design

By DesmondLiu

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updated over 11 years ago by DesmondLiu

2 replies • 14131 views
Discussion

Problem in loading TSMC 0.18u CMOS018/DEEP (6M, HV FET, sblock) model in spectre

Category: Custom IC Design

By rajrevanth61

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updated over 11 years ago by Andrew Beckett

1 replies • 833 views
Discussion

Vbit Source

Category: Custom IC Design

By DigitalOsama

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updated over 11 years ago by Andrew Beckett

3 replies • 16562 views
Discussion

Labels are created in VLE while doing streaming in a GDS file.

Category: Custom IC Design

By RFStuff

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updated over 11 years ago by Andrew Beckett

1 replies • 13623 views

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