Custom IC Design

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Importance of "Enable CellView Check" while filling the quantus assura extraction form?

Category: Custom IC Design

By Vishesh Gupta

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updated over 2 years ago by Vishesh Gupta

2 replies • 1372 views
Discussion

sum of sampled_noise output spectrum, how to access the phase information?

Category: Custom IC Design

By NewScreenName

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updated over 2 years ago by NewScreenName

14 replies • 10128 views
Discussion

ERROR: ADE-5014 in ams simulation

Category: Custom IC Design

By sjwprcker

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updated over 2 years ago by sjwprcker

2 replies • 7445 views
Discussion

How to include extracted output in your adexl simulation?

Category: Custom IC Design

By Vishesh Gupta

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updated over 2 years ago by Vishesh Gupta

6 replies • 8650 views
Discussion

Changing font in "graph summary labels"

Category: Custom IC Design

By rrihak

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started over 2 years ago

0 replies • 735 views
Discussion

Save certain waveform after simulations end while preserving corner order

Category: Custom IC Design

By Zaara

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updated over 2 years ago by ShawnLogan

4 replies • 7373 views
Discussion

Setting default independent variable in ADE Explorer/Assembler

Category: Custom IC Design

By CSCNalu

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updated over 2 years ago by Andrew Beckett

1 replies • 1223 views
Discussion

adexl does not run neither multicorner nor montecarlo simulations

Category: Custom IC Design

By gnangotzi

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started over 2 years ago

0 replies • 6007 views
Discussion

Single layer auto-routing

Category: Custom IC Design

By sumbadee

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started over 2 years ago

0 replies • 6290 views
Discussion

Hierarchical Net Name Preservation in Quantus

Category: Custom IC Design

By Anas Wanas

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started over 2 years ago

0 replies • 6476 views
Discussion

multiple power pads when global supply name used in sub blocks?

Category: Custom IC Design

By kenc184

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updated over 2 years ago by kenc184

9 replies • 9981 views
Discussion

Plot Vdsat from DC sweep analysis?

Category: Custom IC Design

By StephanWeber

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updated over 2 years ago by Andrew Beckett

4 replies • 8795 views
Discussion

Impedance matching

Category: Custom IC Design

By Shanci Hu

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updated over 2 years ago by StephanWeber

1 replies • 6986 views
Discussion

problems with pspice model when simulating with spectre

Category: Custom IC Design

By liangqunshan

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updated over 2 years ago by liangqunshan

6 replies • 8735 views
Discussion

RUN PLAN : The 'analyses' section of the runplan test does not reflect the active setup.

Category: Custom IC Design

By Saikiran IND

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updated over 2 years ago by Saikiran IND

5 replies • 2318 views

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