Hardware/Software Co-Development, Verification and Integration - Recent Threads

Tool Old orcad file need to convert in latest orcad version

KA202608127243 — Wed, 12 Aug 2026 12:14:00 GMT

Hi Team,

I have beagleBone green layout file which is i am trying to open in orcad but it showing 3.x old file can you please convert it in latest version of file.

community.cadence.com/.../3_5F00_BoardFile.zip

IP6514E Driver for Nand Flash

XJ202511099616 — Mon, 10 Nov 2025 02:44:45 GMT

Hi, I am adapting Nand flash based on QSPI Flash controller, part number:IP6514E, but the kernel only supports 'HP-NFC' and I couldn't find one suitable for IP6514E. I am not sure if the official version of the driver code is provided.Looking forward to your reply.

ADE matlab integration to launch MATLAB

HL202503171417 — Tue, 18 Mar 2025 08:20:39 GMT

Hello, I intend to interface with MATLAB to enable MATLAB-controlled layout design, EMX simulation, and Spectre simulation operations in ADE.

However, after completing a simulation in ADE Explorer, clicking the "M button" in ADE Explore does not launch MATLAB.

Are there additional environment variables that need to be configured or other requirements?

Thanks in advance!

Best Practices for Hardware-Software Co-Development in Healthcare Devices

JB202501285441 — Tue, 28 Jan 2025 09:57:20 GMT

Hi everyone,

I’m working on a project involving the co-development of hardware and software for a healthcare device. The goal is to build a smart monitoring device capable of tracking patient vitals and transmitting the data to a secure cloud platform for real-time analysis and reporting.

We’re using a Cadence-based design for the hardware, and the software stack includes embedded C for the firmware and Python for data handling on the backend. Here’s a simplified example of how the firmware is set up to transmit data:

#include <stdio.h>
#include <stdint.h>

void sendDataToCloud(uint16_t heartRate, uint16_t oxygenLevel) {
// Simulating data transmission
printf("Sending Data: Heart Rate: %d, Oxygen Level: %d\n", heartRate, oxygenLevel);
}

int main() {
uint16_t heartRate = 72;
uint16_t oxygenLevel = 98;

// Simulating real-time data
while (1) {
sendDataToCloud(heartRate, oxygenLevel);
// Update data dynamically in a real device
}

return 0;
}

Challenges I’m Facing:

Hardware-Software Synchronization: How do you ensure seamless synchronization between hardware-generated signals and software processing in real-time?
Data Security: What are the best practices for encrypting and securing sensitive patient data during transmission and storage?
Testing & Verification: Are there tools or methodologies you recommend for co-verifying hardware and software to identify and resolve integration issues early?

I’ve explored healthcare software development services that specialize in end-to-end solutions for such devices, but I’d love to hear from this community:

Have you worked on similar hardware-software integration for healthcare or IoT devices?
How do you handle real-time data processing and synchronization challenges?
Any recommendations for tools, frameworks, or workflows to improve development efficiency?

Looking forward to your valuable insights. Thanks in advance!

Can't request Tensilica SDK - Error 500

PD202410025735 — Tue, 22 Oct 2024 14:25:12 GMT

Hi,

I'm looking to download Tensilica SDK for evaluation, but I can't get past the registration form:

How to design enhancement mode eGaN (EPC8002) switch in cadence

IU202408064943 — Tue, 06 Aug 2024 08:44:04 GMT

Hi,

I need to design EPC8002 eGaN switch in cadence. Can someone provide me step by step guide on hoe to add EPC8002 into my cadence. I am working on BCD180.

Thank you

Ihsan

Sweep Function Error

iaty — Fri, 21 Jun 2024 10:32:44 GMT

When I try to implement the sweep inside my verilog file, I get the following errors.

/// Function

swp2 sweep param=Ndiscmin values=[0.011 0.5055 1] { //// Line 63
tran2 tran start=0 stop=1300n errpreset=conservative
}

The code used to Replace Cache useing TCL command

Laoy — Fri, 19 Apr 2024 10:16:17 GMT

use the DBO function DboLib_RepalceCache to do the job of "Replace cache"

in order to easy the job , type the code below . the code is a wrapper of the function metioned above

set lStatus [DboState]
set lSession $::DboSession_s_pDboSession
DboSession -this $lSession
set lDesignsIter [$lSession NewDesignsIter $lStatus]
set lDesign [$lDesignsIter NextDesign $lStatus]
set lNullObj NULL

set oldLibName [DboTclHelper_sMakeCString "E:\\PROJECT_WORKLIB.OLB"]
set newLibName [DboTclHelper_sMakeCString "E:\\MCU_PARTS_LIB.OLB"]

#DboLib_ReplaceCache wrapper
proc ReplaceCacheByName {partName} {
global oldLibName
global newLibName
global lDesign
set lPartStr [DboTclHelper_sMakeCString $partName]
#set lNewStr [DboTclHelper_sMakeCString $newName]
$lDesign ReplaceCache $lPartStr $oldLibName $lPartStr $newLibName 0 1
}

then use the tcl command like below to do the real job :

ReplaceCacheByName "CL10B104KB8NNNC_C12"

How to turn vavlog IO width mismatch error to warning?

jingxiang — Wed, 13 Sep 2023 07:15:52 GMT

Hi, all.

When I use vavlog to compile verilog rtl, it will recognize IO width mismatch problem as a fatal error.

How to turn the error into warning?

VCS can use -error=noIOPCWM to ingore the error.

Is vavlog has similar arguments?

Xtensa compiler issue

MxL Hunter — Thu, 01 Dec 2022 09:31:48 GMT

I have a Xtensa compiler issue that the compilation for switch case would be optimized in some patterns and leads to unexpected result. I cross-checked the assembly code and found that such compiler optimization seems to be similar to the tree-switch-conversion feature in GCC compiler

https://gcc.gnu.org/onlinedocs/gcc-9.1.0/gcc/Optimize-Options.html
-ftree-switch-conversion
Perform conversion of simple initializations in a switch to initializations from a scalar array. This flag is enabled by default at -O2 and highe

Unfortunately I don't find any similar compiler option(like -fno-tree-switch-conversion) in Xtensa compiler(XCC) to enable/disable such feature and such feature seems like enabled in XCC by default even if I'm using -O0 for the least optimization.

I'm wondering if there's any possible solution to permanently disable such feature in XCC?

PS: The release version of XCC compiler I'm using is RD-2012.5

Thanks!

xtensa download

ibrahim06 — Thu, 23 Sep 2021 16:12:45 GMT

I want to download Xtensa C/C++ Compiler (XCC) . I dont know where to download. Please help me.

Issue With Loudness Normalization

Damien Lehner — Thu, 21 Jan 2021 12:19:15 GMT

Hello everyone. In recent days, I'm having a weird problem with sound output on my Windows 10 PC. In fact, I can't control the loudness of it. So is there any possibility of PCB of sound card being damaged?

Formal Verification Approach for I2C Slave

calciuiulian — Mon, 16 Nov 2020 15:31:30 GMT

Hello,

I am new in formal verification and I have a concept question about how to verify an I2C Slave block.

I think the response should be valid for any serial interface which needs to receive information for several clocks before making an action.

The the protocol description is the following:

I have a serial clock (SCL), Serial Data Input (SDI) and Serial Data Output (SDO), all are ports of the I2C Slave block.

The protocol looks like this:

The first byte which is received by the slave consists in 7bits of sensor address and the 8th bit is the command 0/1 Write/Read.

After the first 8 bits, the slave sends an ACK (SDO = 1 for 1 clock) if the sensor address is correct.

Lets consider only this case, where I want to verify that the slave responds with an ACK if the sensor address is correct.

The only solution I found so far was to use the internal buffer from the block which saves the received bits during 8 clocks. The signal is called shift_s.

I also needed to use internal chip state (state_s) and an internal counter (shift_count_s).

Instead of doing an direct check of the SDO(sdo_o) depending on SDI (sdi_d_i), I used the internal shift_s register.

My question is if my approach is the correct one or there is a possibility to write the verification at a blackbox level.

Below you have the 2 properties: first checks connection from SDI to internal buffer, the second checks the connection between internal buffer and output.

property prop_i2c_sdi_store;
@(posedge sclk_n_i)
$past(i2c_bl.state_s == `STATE_RECEIVE_I2C_ADDR)
|-> i2c_bl.shift_s == byte'({ $past(i2c_bl.shift_s), $past(sdi_d_i)});
endproperty
APF_I2C_CHECK_SDI_STORE: assert property(prop_i2c_sdi_store);

property prop_i2c_sensor_addr(sens_addr_sel, sens_addr);
@(posedge sclk_n_i) (i2c_bl.state_s == `STATE_RECEIVE_I2C_ADDR) && (i2c_addr_i == sens_addr_sel) && (i2c_bl.shift_count_s == 7)
##1 (i2c_bl.shift_s inside {sens_addr, sens_addr+1}) |-> sdo_o;
endproperty
APF_I2C_CHECK_SENSOR_ADDR0: assert property(prop_i2c_sensor_addr(0, `I2C_SENSOR_ADDRESS_A0));
APF_I2C_CHECK_SENSOR_ADDR1: assert property(prop_i2c_sensor_addr(1, `I2C_SENSOR_ADDRESS_A1));
APF_I2C_CHECK_SENSOR_ADDR2: assert property(prop_i2c_sensor_addr(2, `I2C_SENSOR_ADDRESS_A2));
APF_I2C_CHECK_SENSOR_ADDR3: assert property(prop_i2c_sensor_addr(3, `I2C_SENSOR_ADDRESS_A3));

PS: i2c_addr_i is address selection for the slave (there are 4 configurable sensor addresses, but this is not important for the case).

Thank you!

SCCM deployment

RNIWeibel — Fri, 06 Nov 2020 06:50:21 GMT

We are having some issues with deploying i. We are looking for the silent command switch for deployment including the licence agreement acceptance.

Ideally we would like a regular MSI that we could install for all users and not in the user content.

How to remove incorrect nets error in cadence?

cadence IIT — Tue, 03 Nov 2020 10:58:16 GMT

While doing the lvs it's showing an error in gnd connection, I am not being able to understand exactly what is the error and what do I need to do to remove this error?

How do I use TCL to get connections between modules in INNOVUS.

xylon — Sun, 20 Sep 2020 04:04:00 GMT

Please give me some ideas. Thank you very much.

QSPI Direct Access bare metal SW driver

stefjoh — Fri, 24 Apr 2020 09:11:32 GMT

Hello,

I'm reading the Design specification for IP6514E.

We will use the DAC mode.

It would seem to be very simple but I don't see any code sequence, i.e.

1.Write 03(Basic Read) to this register

2, Write start adress to this register

3. Write "execute" to this register

4. Read the data from this register

Thanks,

Stefan

Matlab cannot open Pspice, to prompt orCEFSimpleUI.exe that it has stopped working！

hmf1235789 — Thu, 09 Apr 2020 12:08:58 GMT

Cadence_SPB_17.4-2019 + Matlab R2019a

请参考本文档中的步骤进行操作

1，打开BJT_AMP.opj

2，设置Matlab路径

3，打开BJT_AMP_SLPS.slx

4，打开后，设置PSpiceBlock，出现或CEFSimpleUI.exe停止工作

5，添加模块

6，相同

7，打开pspsim.slx

8，相同

9，打开C：\ Cadence \ Cadence_SPB_17.4-2019 \ tools \ bin

orCEFSimpleUI.exe和orCEFSimple.exe

10，相同

我想问一下如何解决，非常感谢！

Arduino: how to save the dynamic memory?

Emma Swift — Wed, 06 Nov 2019 07:25:31 GMT

When the Arduino Mega2560 is added to the first serial port, the dynamic memory is 2000 bytes, and when the second serial serial is added, the dynamic memory is 4000 bytes. Now I need to add the third Serial serial port. The dynamic memory is 6000 bytes. Due to the many variables in the program itself, the dynamic memory is not enough. Please help me how to save the dynamic memory?

USB crash issue in Linux 4.14.62

Anjalik — Tue, 16 Apr 2019 07:16:31 GMT

Hi ,

FIrst of all , I hope I have posted my query in the right place . I am expecting software support/suggestions for the below issue.

I am working on LTE which use USB interface and the Host Controller is USB 2.0 . The BSP is from NXP which supports Cadence USB 3.0 Host controller and with USB 3.0 supported cadence driver.NXP had used the USB 3.0 host controller for USB type C based device.

Cadence USB 3.0 based device driver seems to be backward compatible for USB 2.0 host controller .Since basic LTE functionalities seems to be working fine I continued to use the same driver in Linux 4.14.62

But I am facing a kernel warning of unhandled interrupt and the crash log points to cdns_irq function as shown below The crash/kerenel warning is very random and not occuring all the time.

.691533] irq 36: nobody cared (try booting with the "irqpoll" option)

[ 1.698242] CPU: 0 PID: 87 Comm: kworker/0:1 Not tainted 4.9.88 #24

[ 1.704509] Hardware name: Freescale i.MX8QXP MEK (DT)

[ 1.709659] Workqueue: pm pm_runtime_work

[ 1.713675] Call trace:

[ 1.716123] [<ffff0000080897d0>] dump_backtrace+0x0/0x1b0

[ 1.721523] [<ffff000008089994>] show_stack+0x14/0x20

[ 1.726582] [<ffff0000083daff0>] dump_stack+0x94/0xb4

[ 1.731638] [<ffff00000810f064>] __report_bad_irq+0x34/0xf0

[ 1.737212] [<ffff00000810f4ec>] note_interrupt+0x2e4/0x330

[ 1.742790] [<ffff00000810c594>] handle_irq_event_percpu+0x44/0x58

[ 1.748974] [<ffff00000810c5f0>] handle_irq_event+0x48/0x78

[ 1.754553] [<ffff0000081100a8>] handle_fasteoi_irq+0xc0/0x1b0

[ 1.760390] [<ffff00000810b584>] generic_handle_irq+0x24/0x38

[ 1.766141] [<ffff00000810bbe4>] __handle_domain_irq+0x5c/0xb8

[ 1.771979] [<ffff000008081798>] gic_handle_irq+0x70/0x15c

1.807416] 7a40: 00000000000002ba ffff80002645bf00 00000000fa83b2da 0000000001fe116e

[ 1.815252] 7a60: ffff000088bf7c47 ffffffffffffffff 00000000000003f8 ffff0000085c47b8

[ 1.823088] 7a80: 0000000000000010 ffff800026484600 0000000000000001 ffff8000266e9718

[ 1.830925] 7aa0: ffff00000b8b0008 ffff800026784280 ffff00000b8b000c ffff00000b8d8018

[ 1.838760] 7ac0: 0000000000000001 ffff000008b76000 0000000000000000 ffff800026497b20

[ 1.846596] 7ae0: ffff00000810bd24 ffff800026497b20 ffff000008851d18 0000000000000145

[ 1.854433] 7b00: ffff000008b8d6c0 ffff0000081102d8 ffffffffffffffff ffff00000810dda8

[ 1.862268] [<ffff000008082eec>] el1_irq+0xac/0x120

[ 1.867155] [<ffff000008851d18>] _raw_spin_unlock_irqrestore+0x18/0x48

[ 1.873684] [<ffff00000810bd24>] __irq_put_desc_unlock+0x1c/0x48

[ 1.879695] [<ffff00000810de10>] enable_irq+0x48/0x70

[ 1.884756] [<ffff0000085ba8f8>] cdns3_enter_suspend+0x1f0/0x440

[ 1.890764] [<ffff0000085baca0>] cdns3_runtime_suspend+0x48/0x88

[ 1.896776] [<ffff0000084cf398>] pm_generic_runtime_suspend+0x28/0x40

[ 1.903223] [<ffff0000084dc3e8>] genpd_runtime_suspend+0x88/0x1d8

[ 1.909320] [<ffff0000084d0e08>] __rpm_callback+0x70/0x98

[ 1.914724] [<ffff0000084d0e50>] rpm_callback+0x20/0x88

[ 1.919954] [<ffff0000084d1b2c>] rpm_suspend+0xf4/0x4c8

[ 1.925184] [<ffff0000084d20fc>] rpm_idle+0x124/0x168

[ 1.930240] [<ffff0000084d26c0>] pm_runtime_work+0xa0/0xb8

[ 1.935732] [<ffff0000080dc1dc>] process_one_work+0x1dc/0x380

[ 1.941481] [<ffff0000080dc3c8>] worker_thread+0x48/0x4d0

[ 1.946885] [<ffff0000080e2408>] kthread+0xf8/0x100
[ 1.957080] handlers:

[ 1.959350] [<ffff0000085ba668>] cdns3_irq

[ 1.963449] Disabling IRQ #36

Kindly provide a solution to solve this issue.

Thanks & Regards,

Anjali

LM117 Spice Model

MKad — Wed, 20 Mar 2019 17:07:08 GMT

I am looking for LM117 Pspice model. Can someone send me the file. Thank you

Path mapping for C Firmware source files when debugging

29erpete — Mon, 25 Feb 2019 16:24:37 GMT

Hi,

i am compiling firmware under Windows transfer the binaries and the sources to Linux to simulate/debug there. The problem is that the paths in the DWARF debug info of the .elf file are the absolute Windows paths as set by the compiler so they are useless under Linux. Is it possible to configure mappings of these paths to the Linux paths when simulating/debugging like with e.g. GDB (https://sourceware.org/gdb/current/onlinedocs/gdb/Source-Path.html#index-set-substitute_002dpath)?

thx,

Peter

Functional coverage report.

Sparsh Gupta — Wed, 13 Feb 2019 23:37:00 GMT

Is there a way to generate coverage reports, not in ucd or any other format. I have written basic covergroup and passed arguments[-covoverwrite -cov_cgsample -cov_debuglog -coverage u] to the xrun command, however I don't see anything in sim directory, nor do I see anything in the logs indicating the covergroups have been hit. How can I confirm that cover groups are getting hit and essentially observe the bins. In Questa sim, you essentially get them as part of the log itself.

Using oscillograph waveform file CSV as the Pspice simulation signal source

Jack Li — Tue, 20 Nov 2018 06:28:04 GMT

hi,

I save the waveform file of the oscilloscope as CSV file format.

Now, I need to use this waveform file as the source of the low-pass filter .

I searched and read the PSPICE help documents, and did not find any methods.

How to realize it?

Are there any reference documents or examples?

Thanks!

TensorFlow Optimization in DSVM: Azure and Cadence

itsekar — Mon, 22 Oct 2018 12:41:39 GMT

Hello Folks,

Problem statement first: How does one properly setup tensorflow for running on a DSVM using a remote Docker environment? Can this be done in aml_config/*.runconfig?

I receive the following message and I would like to be able to utilize the increased speeds of the extended FMA operations.

tensorflow/core/platform/cpu_feature_guard.cc:140] Your CPU supports instructions that this TensorFlow binary was not compiled to use: AVX2 FMA

Background: I utilize a local docker environment managed through Azure ML Workbench for initial testing and code validation so that I'm not running an expensive DSVM constantly. Once I assess that my code is to my liking, I then run it on a remote docker instance on an Azure DSVM.

I want a consistent conda environment across my compute environments, so this works out extremely well. However, I cannot figure out how to control the tensorflow build to optimize for the hardware at hand (i.e. my local docker on macOS vs. remote docker on Ubuntu DSVM)