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I am using Allegro PCB Design L and Allegro Design Entry CIS 16.3. All of my components are managed through a central CIS database (complete w/ footprints, part numbers, etc.)
I am having significant difficulties performing back annotation. When I finished laying out the board, I performed an auto-refdes rename. I was then able to successfully back annotate the design (after several attempts -- with identical actions performed). Later, I added a single component in the schematic side. I recreated a netlist, and imported it into Allegro. I placed the component, and re-performed the auto refdes rename. This time, no matter what I do, I am unable to back annotate the design. I get a large number of error in my swp.log file.
#549 ERROR(SPCODD-549): No physical part found for COMP_DEVICE_TYPE=RESISTOR_R0603_ERJ-3EKF2491V_22, regenerate the netlist to sync with Allegro board. ERROR(SPCODD-516): Line Number: 4#549 ERROR(SPCODD-549): No physical part found for COMP_DEVICE_TYPE=RESISTOR_R0603_ERJ-3EKF2491V_22, regenerate the netlist to sync with Allegro board. ERROR(SPCODD-516): Line Number: 5
I saved a backup before I did the second auto refdes rename. This should be a copy of the project where the .brd and .dsn files are in complete sync (i.e., right after importing a brand new netlist into the .brd). Even this is unable to back annotate.
Has anyone seen this and/or been able to solve it?
Which netlist flow are you using? There is no "import into Allegro" needed if you are using the built-in OrCAD (packager) netlist flow.Sounds like you have been beating the design with a hammer to get it to "work" correctly. It also sounds like you broke synchronization between the board and the schematic.
You need to learn the packager netlist flow and repackage the schematic against the board. Sure it might rip something up but the problem will be revealed. You can easily correct the problem and repackage against the board and hopefully not have any major issues.
Backannotation should resolve itself after this.
Thanks, but I am actually intimately familiar with both the forward and backward annotation processes. I also have not done anything to get the board and schematic "out of sync." In fact, if I create a new netlist from OrCAD and then immediately perform a back annotation, I get the same errors. Neither me nor the technical support staff at my software distributor were able to fix the problem. Fortunately, the Cadence support staff were able to resolve the issue when contacted directly. They just weren't sure how, or what had happened to create the problem.
Can you tell me how you were able to resolve this issue?
Any help is much appreciated.
I have encountered this issue many times over the past few years, and was finally able to resolve it. The problem for me was that in Capture's Tools > Back Annotate window, it was looking for the wrong PCB Editor Board File. Once I fixed that, the back annotate worked properly and the .swp file showed all the refdes that I changed in PCB Designer.