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Hello Every one.
I Have copied an already existing Cadence Allegro project *.cpm and want to modify it.
I have made some changes to schematics in design entry HDL and have also changed the stacak-up or Cross-section of brd file.
The number of layers remain the same (8 layer), but swap some layers, changes the di-electric thickness between them.
But there is a problem:
Any time, when I export design from Design Entry HDL to Allegro,
The stack up resets and change to older one.
Could any one suggest, where I have to fix this problem?