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<?xml-stylesheet type="text/xsl" href="https://community.cadence.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Allegro X Capture CIS - Recent Threads</title><link>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis</link><description /><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 10 Sep 2026 17:46:34 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis" /><item><title>Why Are Identical Non-Database Parts Listed Separately in CIS BOM?</title><link>https://community.cadence.com/thread/66327?ContentTypeID=0</link><pubDate>Thu, 10 Sep 2026 17:46:34 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:c3489618-2862-4d59-8fb3-26c9e15ce6aa</guid><dc:creator>LogicNet</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/66327?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/66327/why-are-identical-non-database-parts-listed-separately-in-cis-bom/rss?ContentTypeId=0</wfw:commentRss><description>&lt;div&gt;Hi,&lt;br /&gt;&lt;br /&gt;In Capture, while generating a CIS BOM, I noticed that three resistor components placed from a schematic library (not linked to the CIS database) are listed as separate BOM entries even though they all have the same Value of 4.7k. I expected them to be combined into a single line item with the quantity updated accordingly. How does Capture determine whether non-database components are grouped together in a BOM, and is there a way to generate a compressed BOM for such parts?&lt;/div&gt;</description></item><item><title>Using alternate schematic symbols</title><link>https://community.cadence.com/thread/66321?ContentTypeID=0</link><pubDate>Wed, 09 Sep 2026 19:37:44 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:50edf9dc-1f3a-4863-ad93-c447a46e9aea</guid><dc:creator>DP202605218058</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/66321?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/66321/using-alternate-schematic-symbols/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hi all.&amp;nbsp; I want to replace a schematic symbol on schematic sheet with an alternate schematic symbol that is already assigned to the part.&amp;nbsp; I would think a &amp;#39;RMB &amp;gt; alternate schematic symbol&amp;#39; would be available, but I don&amp;#39;t see anything like that.&amp;nbsp; So how does one choose the alternate schematic symbol to place on a schematic sheet?&amp;nbsp; Again, the alternate schematic symbol is already assigned to the part; I can view it in CIP under the part number, I just can&amp;#39;t figure out how to place the alternate on a schematic.&amp;nbsp; OrCAD Capture V22.1&lt;/p&gt;</description></item><item><title>RE: Using alternate schematic symbols</title><link>https://community.cadence.com/thread/1409303?ContentTypeID=1</link><pubDate>Thu, 10 Sep 2026 17:39:55 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:e35255b0-8661-44fa-95f8-5058410c2aa7</guid><dc:creator>TechnoBobby</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/1409303?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/66321/using-alternate-schematic-symbols/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hi &lt;a href="https://community.cadence.com/members/dp202605218058"&gt;DP202605218058&lt;/a&gt;&amp;nbsp;,&lt;br /&gt;&lt;br /&gt;Are you using CIS Explorer to place the part from the CIP database?&lt;br /&gt;&lt;br /&gt;If so, select the component on the schematic and choose Link Database Part. In the Link Database Part window, check the Schematic Part drop-down list. If multiple schematic symbols are associated with the database component, you can select the desired symbol from that drop-down and then complete the link operation.&lt;br /&gt;&lt;br /&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/109/Scre2.png" alt=" " /&gt;&lt;br /&gt;&lt;br /&gt;Additionally, if a Convert View is available, you can choose Normal or Convert from the Graphic section in the upper-right corner.&lt;br /&gt;&lt;br /&gt;Hope this helps.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: BOM GENERATOR ver2.6.9</title><link>https://community.cadence.com/thread/1409286?ContentTypeID=1</link><pubDate>Wed, 09 Sep 2026 13:00:17 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:1cc4db7f-b0f0-4bfe-9a35-6b8c20505e35</guid><dc:creator>TechnoBobby</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/1409286?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/66318/bom-generator-ver2-6-9/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hi &lt;a href="https://community.cadence.com/members/js202609088334"&gt;JS202609088334&lt;/a&gt;&amp;nbsp;,&lt;br /&gt;&lt;br /&gt;Could you please check the Session Log and let us know if any additional error or warning messages are reported when the BOM generation fails? Also, please share a screenshot of the complete error message, confirm whether the issue is specific to one design or occurs with all designs, and let us know which OrCAD Capture version you are using. This information will help with further troubleshooting.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>BOM GENERATOR ver2.6.9</title><link>https://community.cadence.com/thread/66318?ContentTypeID=0</link><pubDate>Tue, 08 Sep 2026 07:43:55 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:c5e2727d-bf81-4d86-8f0d-8ab8214187a4</guid><dc:creator>JS202609088334</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/66318?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/66318/bom-generator-ver2-6-9/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Good day I&amp;rsquo;m having trouble about generating BOM the error say&lt;/p&gt;
&lt;p&gt;****Error!!Multiple Variant files present.&lt;/p&gt;</description></item><item><title>Capture add intersheet reference lockup?</title><link>https://community.cadence.com/thread/52609?ContentTypeID=0</link><pubDate>Wed, 28 Sep 2022 13:49:54 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:aaca4e42-cfa4-4483-9cbe-94d8733add72</guid><dc:creator>FDIMark</dc:creator><slash:comments>3</slash:comments><comments>https://community.cadence.com/thread/52609?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/52609/capture-add-intersheet-reference-lockup/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;I have a schematic design that I cannot add intersheet references? (actually update them)&lt;/p&gt;
&lt;p&gt;- the design had intersheet references&lt;/p&gt;
&lt;p&gt;- edited the schematic and need to update the intersheet references&lt;/p&gt;
&lt;p&gt;- run Annotate&amp;gt;Add Intersheet References&amp;gt;OK&amp;gt;OK (with same settings I&amp;#39;ve always used)&lt;/p&gt;
&lt;p&gt;- Capture immediately locks up...&lt;/p&gt;
&lt;p&gt;I have to run task manager and and end the OrCAD Capture task&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;It&amp;#39;s something to do with this specific schematic, and only since I edited the schematic (remember, it previously had the intersheet references)&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Here&amp;#39;s what I&amp;#39;ve tried;&lt;/p&gt;
&lt;p&gt;- I deleted the intersheet references (no lockup)&lt;/p&gt;
&lt;p&gt;- Saved the design and tried adding them back, locks up&lt;/p&gt;
&lt;p&gt;- cleared the cache also didn&amp;#39;t help&lt;/p&gt;
&lt;p&gt;-&amp;nbsp;Updated Capture to the latest hot fix, running 17.4-2019-S032&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Anyone else have this issue, and most importantly, find the fix?&lt;/p&gt;</description></item><item><title>RE: Capture add intersheet reference lockup?</title><link>https://community.cadence.com/thread/1409284?ContentTypeID=1</link><pubDate>Tue, 08 Sep 2026 20:26:12 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:c2e5e69b-306c-4626-aebe-7ff31a82dccd</guid><dc:creator>ZP202407159252</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/1409284?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/52609/capture-add-intersheet-reference-lockup/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;FYI for anyone else encountering this: Deleting the project and creating a new project from the same DSN file is a much quicker way to fix this issue.&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Control Bill Of Materials of different revision</title><link>https://community.cadence.com/thread/1409280?ContentTypeID=1</link><pubDate>Sun, 06 Sep 2026 18:27:47 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:5a640099-2c6a-4b16-9b5c-5f50969d4963</guid><dc:creator>TechnoBobby</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/1409280?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/66312/control-bill-of-materials-of-different-revision/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hi &lt;a href="https://community.cadence.com/members/filo221"&gt;Filo221&lt;/a&gt;&amp;nbsp;,&lt;br /&gt;&lt;br /&gt;Could you provide a bit more detail on your workflow? Are these worksheets representing different design revisions or different assembly variants, and what specific differences are you typically looking to verify after exporting the BOM (added/removed parts, quantity changes, MPN/value changes, DNI/DNP status, etc.)?&lt;br /&gt;&lt;br /&gt;Also, if you are comparing different design revisions, have you tried Tools &amp;gt; Compare Design? It can help identify schematic-level differences such as added or deleted parts, property changes, connectivity changes, and net differences between design revisions.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Control Bill Of Materials of different revision</title><link>https://community.cadence.com/thread/66312?ContentTypeID=0</link><pubDate>Fri, 04 Sep 2026 15:11:45 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:10160094-15a6-40fd-b695-2ec1fbcefc18</guid><dc:creator>Filo221</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/66312?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/66312/control-bill-of-materials-of-different-revision/rss?ContentTypeId=0</wfw:commentRss><description>&lt;div&gt;
&lt;p&gt;I&amp;#39;m looking for some advice on BOM management and revision control.&lt;/p&gt;
&lt;p&gt;I use a multi-sheet Excel file, where each worksheet represents a different variant in the CIS. For every modification, I update the revision and date of the corresponding worksheet.&lt;/p&gt;
&lt;p&gt;We are talking about BOMs with approximately 1,500 components. Once the BOM has been exported from the CIS, what checks do you typically perform?&lt;/p&gt;
&lt;p&gt;Is there a tool available that can compare two BOMs and provide a detailed report of the differences?&lt;/p&gt;
&lt;p&gt;Thanks&amp;nbsp;&lt;/p&gt;
&lt;/div&gt;
&lt;p&gt;&lt;/p&gt;</description></item><item><title>Hierarchical Design Challenge: New Ports Added!</title><link>https://community.cadence.com/thread/66306?ContentTypeID=0</link><pubDate>Thu, 03 Sep 2026 16:23:38 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:7f3ed51e-83b4-4b24-8d94-2bbef4200956</guid><dc:creator>TechnoBobby</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/66306?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/66306/hierarchical-design-challenge-new-ports-added/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;A Buck Converter is implemented as a hierarchical block in the parent schematic.&lt;br /&gt;&lt;br /&gt;Initially, the child schematic contained only &lt;strong&gt;Vin, Vout, and PWM&lt;/strong&gt; ports, and the H-Block was already placed and connected.&lt;br /&gt;&lt;br /&gt;&lt;img style="max-height:224px;max-width:389px;" height="224" src="https://community.cadence.com/resized-image/__size/778x448/__key/communityserver-discussions-components-files/109/SS1.png" width="389" alt=" " /&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/109/SS2.png" alt=" " /&gt;&lt;br /&gt;Later, the design was expanded and two new ports were added to the child schematic:&amp;nbsp;&lt;strong&gt;PGOOD and&amp;nbsp;&lt;/strong&gt;&lt;strong&gt;Fault&lt;br /&gt;&lt;br /&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/109/Screenshot-2026_2D00_09_2D00_03-214026.png" alt=" " /&gt;&lt;br /&gt;&lt;br /&gt;&lt;/strong&gt;How would you update the existing H-Block in the parent schematic so the new ports become available?&lt;br /&gt;&lt;br /&gt;&lt;strong&gt;A.&lt;/strong&gt; Delete and recreate the H-Block&lt;br /&gt;&lt;strong&gt;B.&lt;/strong&gt; Manually add and rename hierarchical pins&lt;br /&gt;&lt;strong&gt;C.&lt;/strong&gt;&amp;nbsp;Synchronize Up the Hierarchical Block&amp;nbsp;&lt;br /&gt;&lt;strong&gt;D.&lt;/strong&gt; &lt;span&gt;Synchronize&amp;nbsp;Down the Hierarchical Block&lt;/span&gt;&lt;/p&gt;</description></item><item><title>Access and Review Designs with OrCAD X Cloud.</title><link>https://community.cadence.com/thread/66301?ContentTypeID=0</link><pubDate>Tue, 01 Sep 2026 06:10:07 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:37c7f184-7af3-41b1-96d4-f2adf4fabe23</guid><dc:creator>Jeet</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/66301?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/66301/access-and-review-designs-with-orcad-x-cloud/rss?ContentTypeId=0</wfw:commentRss><description>&lt;div&gt;The web-based collaboration capabilities of OrCAD X Cloud help engineers, reviewers, and project stakeholders stay connected throughout the design process. Whether reviewing schematics, providing feedback, or validating PCB layouts, users can work together more efficiently while maintaining a single source of truth for the design.&lt;/div&gt;
&lt;p&gt;To access the OrCAD X Cloud workspace, follow these steps:&lt;/p&gt;
&lt;ol&gt;
&lt;li&gt;
&lt;p&gt;Navigate to the&lt;span&gt;&amp;nbsp;&lt;/span&gt;&lt;strong&gt;pcb.cadence.com/dashboard&amp;#160;&lt;/strong&gt;website in a web browser.&lt;/p&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;p&gt;Enter your login credentials to authenticate.&lt;/p&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;p&gt;Upon successful login, your Cloud Workspace will open, granting you access to the web version of your&lt;span&gt;&amp;nbsp;&lt;/span&gt;&lt;strong&gt;Workspace&lt;/strong&gt;, as shown below:&lt;br /&gt;&lt;br /&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/109/pastedimage1788242950862v2.png" alt=" " /&gt;&lt;/p&gt;
&lt;/li&gt;
&lt;/ol&gt;
&lt;p&gt;&lt;/p&gt;
&lt;div&gt;Have you started using OrCAD X Cloud for your design reviews and collaboration workflows? Share your experiences and best practices&amp;nbsp;here!&lt;/div&gt;
&lt;p&gt;&lt;/p&gt;</description></item><item><title>Tired of Repetitive Login Pop-ups?</title><link>https://community.cadence.com/thread/66300?ContentTypeID=0</link><pubDate>Tue, 01 Sep 2026 05:53:46 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:fbd3d527-2192-469e-95bf-5fd347386333</guid><dc:creator>Renu Vibha</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/66300?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/66300/tired-of-repetitive-login-pop-ups/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Does the Cloud login prompt in OrCAD X Capture CIS interrupt your workflow every time you start the tool?&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Find the solution here:&lt;br /&gt;&lt;a href="https://ask.cadence.com/ASK/article-viewer?id=a1OPP000001SkfF2AS&amp;amp;pageName=article-viewer"&gt;&lt;em&gt;In OrCAD X Capture CIS, how do I disable the login pop-up that appears for Cloud services every time I start the tool?&lt;/em&gt;&lt;/a&gt;&lt;/p&gt;</description></item><item><title>What do ^ and ! mean in Intersheet References? Can they be removed?</title><link>https://community.cadence.com/thread/66292?ContentTypeID=0</link><pubDate>Thu, 27 Aug 2026 18:19:45 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:5dcdb081-8d84-41c0-aae2-93a74dca9061</guid><dc:creator>LogicNet</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/66292?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/66292/what-do-and-mean-in-intersheet-references-can-they-be-removed/rss?ContentTypeId=0</wfw:commentRss><description>&lt;div&gt;
&lt;p&gt;I noticed that OrCAD Capture adds &lt;code&gt;^&lt;/code&gt; and &lt;code&gt;!&lt;/code&gt; symbols in Intersheet References by default. I assume they indicate whether the referenced page is above or below the current page, but I&amp;#39;m not sure what their exact purpose is.&lt;br /&gt;&lt;br /&gt;Can someone explain what these symbols mean? Also, is there a way to remove them if they&amp;#39;re not needed? Has anyone customized this behavior in their designs?&lt;/p&gt;
&lt;/div&gt;</description></item><item><title>RE: What do ^ and ! mean in Intersheet References? Can they be removed?</title><link>https://community.cadence.com/thread/1409257?ContentTypeID=1</link><pubDate>Fri, 28 Aug 2026 12:44:02 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:df679cf2-b281-45ab-994d-eff84728b046</guid><dc:creator>rg13</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/1409257?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/66292/what-do-and-mean-in-intersheet-references-can-they-be-removed/rss?ContentTypeId=0</wfw:commentRss><description>&lt;div&gt;&lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;The&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;caret&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;symbol&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;(^)&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;indicates&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;that&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;the&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;signal&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;exists&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;one&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;level&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;higher&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;in&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;the&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;hierarchy.&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;An&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;exclamation&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;(!)&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;symbol&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;indicates&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;that&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;the&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;signal&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;exists&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;one&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;level&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;lower&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;in&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;the&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;hierarchy.&lt;/span&gt;&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: 25.1 HF005 - PDF Export/Printing in BW?</title><link>https://community.cadence.com/thread/1409245?ContentTypeID=1</link><pubDate>Tue, 25 Aug 2026 11:31:46 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:27551385-f2c5-4ce8-a145-94990718301f</guid><dc:creator>PatEscher</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/1409245?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/66282/25-1-hf005---pdf-export-printing-in-bw/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;&lt;a href="https://community.cadence.com/members/ishas"&gt;IshaS&lt;/a&gt;&amp;nbsp;&lt;br /&gt;you are referring to which print options? I did not see any option in any preference where I can set the PDF option (I can only so some in the print screen itself)&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>25.1 HF005 - PDF Export/Printing in BW?</title><link>https://community.cadence.com/thread/66282?ContentTypeID=0</link><pubDate>Sat, 22 Aug 2026 09:14:37 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:ad14b0e0-5068-4793-86d5-813054bd6910</guid><dc:creator>Ulf K</dc:creator><slash:comments>3</slash:comments><comments>https://community.cadence.com/thread/66282?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/66282/25-1-hf005---pdf-export-printing-in-bw/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Greetings forum,&lt;/p&gt;
&lt;p&gt;&lt;br /&gt;My desire is to print schematics in BW and have them printed with thinnest possible wire widths.&lt;/p&gt;
&lt;p&gt;For this, I have previously used CutePDF as print engine and Foxit PDF reader to view and from there print pages that I wanted.&lt;/p&gt;
&lt;p&gt;Earlier, Cadence seemed to use GhostScript engine for PDF generation. Now with 25.1 HF005 it seems that Cadence have&lt;/p&gt;
&lt;p&gt;written its own interface or embedded the GhostScript into the software. Anyway, there are no PDF options for quality in that&lt;/p&gt;
&lt;p&gt;interface.&lt;/p&gt;
&lt;p&gt;&lt;br /&gt;Now the print outs if using print to PDF are either in color with thick wires or when using Export-&amp;gt;PDF that the wires are BW but thick.&lt;/p&gt;
&lt;p&gt;I have looked around the the print setup menus for OrCADPS or CutePDF (or any other output format that is to direct&lt;/p&gt;
&lt;p&gt;prints to .PDF.) Regardless of me defining BW, I cannot get what I want.&lt;/p&gt;
&lt;p&gt;&lt;br /&gt;Having multiple versions of Cadence SPB in my computer, Windows also asks me if it should remove some of the OrCADPS&lt;/p&gt;
&lt;p&gt;relating to older versions (than 25.1) something that I do not dare to even consider, since I accidentally removed them&lt;/p&gt;
&lt;p&gt;earlier and it was not that easy to recreate them. This however perhaps a question that should be directed to the software build team.&lt;/p&gt;
&lt;p&gt;&lt;br /&gt;If there are any PDF setting that controls the generated width of graphic lines, please let me know.&lt;/p&gt;</description></item><item><title>RE: 25.1 HF005 - PDF Export/Printing in BW?</title><link>https://community.cadence.com/thread/1409244?ContentTypeID=1</link><pubDate>Tue, 25 Aug 2026 11:29:15 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:3fdbb86e-f79d-43d3-81cf-0929a4e883c9</guid><dc:creator>Ulf K</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/1409244?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/66282/25-1-hf005---pdf-export-printing-in-bw/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;I noticed that Cadence have changed the way for printing/exporting. Several improvements but room for more of them.&lt;/p&gt;
&lt;p&gt;Thinnest possible it is but the lines are way too thin...&lt;/p&gt;
&lt;p&gt;It is not the grid lines in Capture. It is the wires in the schematic drawing and component outlines in the Assembly drawings in the PCB Editor.&lt;/p&gt;
&lt;p&gt;Texts and drawing elements such as the title block are OK.&lt;/p&gt;
&lt;p&gt;What I lack in the schematic (Capture) settings apart from the color scheme would be to add a setting &amp;quot;Print settings: Color [ ] Black&amp;amp;White [ ] &amp;quot; As of now, I can output in color only and in the .PDF writer increase the generated line widths manually, in my case by a factor 10 in Foxit PDF reader. I still get a .PDF in color but it is readable. I use Dark application settings with Legacy print options. Trying to change print colors in the Capture print setup &amp;quot;Print all colors in black&amp;quot; does nake the output BW but lines (wires) are still 1 pixel wide and the output is not readable.&lt;/p&gt;
&lt;p&gt;The same situation exists in PCB Editor/Allegro. I have to increase the line widths in Foxit PDF reader.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: 25.1 HF005 - PDF Export/Printing in BW?</title><link>https://community.cadence.com/thread/1409243?ContentTypeID=1</link><pubDate>Tue, 25 Aug 2026 10:26:40 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:adfbe3e9-e25d-4807-ac39-f869f54722a8</guid><dc:creator>IshaS</dc:creator><slash:comments>2</slash:comments><comments>https://community.cadence.com/thread/1409243?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/66282/25-1-hf005---pdf-export-printing-in-bw/rss?ContentTypeId=0</wfw:commentRss><description>&lt;div&gt;
&lt;p&gt;Hi Ulf,&lt;/p&gt;
&lt;p&gt;With the new UI, Ghostscript (GS) is no longer required. You can simply export the schematic directly to PDF using File &amp;gt; Export &amp;gt; PDF.&lt;/p&gt;
&lt;p&gt;Currently, there is a known issue where changes made under Options &amp;gt; Preferences for PDF export settings are not retained.&lt;/p&gt;
&lt;p&gt;For example, enabling or disabling the Grid option for Smart PDF does not persist after saving. The R&amp;amp;D team is aware of this issue and is actively working on a fix.&lt;/p&gt;
&lt;p&gt;Regarding the graphic lines, are you looking to increase these Grid line width in the schematic view and the exported PDF?&lt;/p&gt;
&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Understanding the Auto Backup Feature in OrCAD Capture CIS</title><link>https://community.cadence.com/thread/66256?ContentTypeID=0</link><pubDate>Tue, 11 Aug 2026 11:11:31 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:dab78b3f-8acc-4f74-a10e-9fc76bf3365d</guid><dc:creator>IshaS</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/66256?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/66256/understanding-the-auto-backup-feature-in-orcad-capture-cis/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;OrCAD Capture CIS provides an &lt;strong&gt;Auto Backup (Multi-level Backup)&lt;/strong&gt; feature that helps protect users from losing unsaved design changes. This feature automatically creates design backup files when specific conditions are met, providing an additional safety net in the event of application crashes, system failures, or other unexpected interruptions.&lt;/p&gt;
&lt;p&gt;The &lt;strong&gt;Multi-level Backup Settings&lt;/strong&gt; dialog box can be accessed by selecting &lt;strong&gt;Options &amp;rarr; Auto Backup&lt;/strong&gt; from the main menu.&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/109/pastedimage1786446507707v2.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;&lt;span data-teams="true"&gt;&lt;span class="fui-Primitive ___1gs1a2d f10pi13n f14t3ns0"&gt;&lt;span class="___164yu9v ftuwxu6 f1qdqbpl fua484e f1o6l1dn fac4klo frp1kbq f3wazqe f19l72ij fcsrh55 frnyhdv fyo61pj f1spqul0 f7dkd9s fkq5uzf f1x4fozf fwl63ro f1npyoe5 f10yrmu1 f1w45tcp f1rhua56 f18c6rdl f1e7lo8u f1dpi1ry f1vs2jsm f1o6uux1 f1nu0r7q fg0t3io f1x8dyll f2yyzyc f1sjbqdg fyzb71r fh1aahx f1oktu5 f1d3652t fed2bxt fpeluho f1e76dpb f1lwmlrd f1nri12l f1d705n1 f1jrvuk2 f11h0gum f1tandro fxjdbx7 f1hva1tl fsaoqmu f1w7c29l f1uakdsb f7jsfu7 f1hz9qas f1vmprsu fbmzazh f1oojlmx fpbf6y8 fy6vjqu fuo4419 fbzygsp fnuenae fw75flx f12oply1 fvyt4us f4ki1i fyy2ueq f1w3oopj fum67ou f1j64hbx f1a9cdrb f1q6iyvy f1s5r85c f920ium fhj6euq f30elfj f1kcike0 f1byno2r f5wk2nc fo3pyhm f1m95b1n fob93lq f9myhws fwkcdud f1a3p1vp" itemtype="http://schema.skype.com/AMSImage"&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;A backup is generated when&amp;nbsp;below conditions are satisfied:&lt;/p&gt;
&lt;ol&gt;
&lt;li&gt;The design has been modified.&lt;/li&gt;
&lt;li&gt;The design has &lt;strong&gt;not&lt;/strong&gt; been manually saved within the configured backup interval.&lt;/li&gt;
&lt;/ol&gt;
&lt;p&gt;&lt;strong&gt;Example&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;If the backup interval is set to &lt;strong&gt;10 minutes&lt;/strong&gt;:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;A user modifies the design at &lt;strong&gt;10:00 AM&lt;/strong&gt;.&lt;/li&gt;
&lt;li&gt;If the design is manually saved before &lt;strong&gt;10:10 AM&lt;/strong&gt;, no .DBK backup file is created.&lt;/li&gt;
&lt;li&gt;If the design remains unsaved for 10 minutes after the modification, Capture automatically creates a &lt;strong&gt;.DBK (Design Backup)&lt;/strong&gt; file in the configured backup directory.&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;span&gt;The &lt;strong&gt;Auto Backup (Multi-level Backup)&lt;/strong&gt; feature acts as a safety mechanism to protect users from losing unsaved design changes.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Hope you have tried it. &lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Share scenarios in which the backup feature helped saving your data from getting lost.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Happy learning!!&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;</description></item><item><title>Browsable CIS link always opens in Microsoft Edge</title><link>https://community.cadence.com/thread/66217?ContentTypeID=0</link><pubDate>Wed, 29 Jul 2026 15:41:12 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:f0d44af6-5292-4f03-8eb4-ac6364d5b8cb</guid><dc:creator>LogicNet</dc:creator><slash:comments>2</slash:comments><comments>https://community.cadence.com/thread/66217?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/66217/browsable-cis-link-always-opens-in-microsoft-edge/rss?ContentTypeId=0</wfw:commentRss><description>&lt;div&gt;
&lt;p&gt;Hi all,&lt;br /&gt;&lt;br /&gt;I am using Capture CIS and have configured a property as Browsable, allowing users to click a link directly from CIS Explorer and open the associated document or webpage.&lt;br /&gt;The functionality works as expected, but whenever I click the link, it always opens in Microsoft Edge. On my system, I would prefer these links to open in Google Chrome instead.&lt;/p&gt;
&lt;p&gt;I checked the CIS configuration but could not find any setting that allows me to specify which browser should be used for browsable links.&lt;/p&gt;
&lt;p&gt;Is it possible to configure CIS to launch browsable links using a specific browser such as Chrome? &lt;br /&gt;&lt;br /&gt;Thanks!&lt;/p&gt;
&lt;/div&gt;</description></item><item><title>RE: Browsable CIS link always opens in Microsoft Edge</title><link>https://community.cadence.com/thread/1409139?ContentTypeID=1</link><pubDate>Mon, 10 Aug 2026 10:01:05 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:a844496b-d1b5-4194-b0cc-d4c2aa1ff79f</guid><dc:creator>TechnoBobby</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/1409139?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/66217/browsable-cis-link-always-opens-in-microsoft-edge/rss?ContentTypeId=0</wfw:commentRss><description>&lt;div&gt;
&lt;p&gt;Hi &lt;a href="https://community.cadence.com/members/logicnet"&gt;LogicNet&lt;/a&gt;&amp;nbsp;,&lt;br /&gt;&lt;br /&gt;The browser used for browsable links in CIS Explorer is controlled by Windows, not by a CIS-specific setting.&lt;br /&gt;&lt;br /&gt;As &lt;a href="https://community.cadence.com/members/ulf-k"&gt;Ulf K&lt;/a&gt;&amp;nbsp;mentioned, the first thing to check is Windows Default Apps. If Google Chrome is configured as the default application for HTTP and HTTPS links, browsable links from CIS Explorer should open in Chrome rather than Microsoft Edge.&lt;br /&gt;&lt;br /&gt;If links continue to open in Edge even after changing the Windows default browser, then verify the registry association referenced in below article on ASK portal:&lt;br /&gt;&lt;br /&gt;Title: How to configure browsable links in OrCAD Capture CIS Explorer and set the default browser&lt;br /&gt;URL: &lt;a href="https://ask.cadence.com/ASK/article-viewer?id=a1Od0000007MKbeEAG&amp;amp;pageName=article-viewer"&gt;https://ask.cadence.com/ASK/article-viewer?id=a1Od0000007MKbeEAG&amp;amp;pageName=article-viewer&lt;/a&gt;&lt;br /&gt;&lt;br /&gt;Hope this helps.&lt;/p&gt;
&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: ERROR  (ORCOMMN-12005) Unable to launch Orcad Capture.</title><link>https://community.cadence.com/thread/1409125?ContentTypeID=1</link><pubDate>Thu, 06 Aug 2026 09:14:52 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:21956ade-b8b6-4f6a-b8ff-6375bb976dcb</guid><dc:creator>rg13</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/1409125?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/66152/error-orcommn-12005-unable-to-launch-orcad-capture/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;CDS_LIC_FILE variable should be set in your environment&lt;/p&gt;
&lt;p&gt;i.e.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;CDS_LIC_FILE=5280@&amp;lt;license_server_hostname/address&amp;gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>ERROR  (ORCOMMN-12005) Unable to launch Orcad Capture.</title><link>https://community.cadence.com/thread/66152?ContentTypeID=0</link><pubDate>Thu, 09 Jul 2026 12:05:18 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:fb050bee-c79c-4c35-83d2-0b5d903fb39d</guid><dc:creator>Shashank</dc:creator><slash:comments>2</slash:comments><comments>https://community.cadence.com/thread/66152?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/66152/error-orcommn-12005-unable-to-launch-orcad-capture/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;&lt;strong&gt;ERROR&amp;nbsp; (ORCOMMN-12005) Unable to launch Orcad Capture. A valid license wasn found at the 5280@hostname license server. Update the license server configuration to include OrCAD Capture licenses&lt;/strong&gt;&lt;/p&gt;
&lt;p class="zlAe0W_TextBase zlAe0W_Text" data-w-component="text" data-w-wrap="normal"&gt;I have installed &lt;span class="zlAe0W_TextBase zlAe0W_Text" data-w-component="text" data-w-weight="bold" data-w-inline="" data-w-whitespace="linebreaks" data-w-wrap="normal"&gt;OrCAD 25.1&lt;/span&gt; and configured the environment variables to point to the license server. Additionally, I have verified that ports &lt;span class="zlAe0W_TextBase zlAe0W_Text" data-w-component="text" data-w-weight="bold" data-w-inline="" data-w-whitespace="linebreaks" data-w-wrap="normal"&gt;5280&lt;/span&gt; and &lt;span class="zlAe0W_TextBase zlAe0W_Text" data-w-component="text" data-w-inline="" data-w-whitespace="linebreaks" data-w-wrap="normal" data-w-weight="bold"&gt;3000&lt;/span&gt; are in the listening state.&lt;/p&gt;
&lt;p class="zlAe0W_TextBase zlAe0W_Text" data-w-component="text" data-w-wrap="normal"&gt;However, I am still encountering the attached error.&lt;/p&gt;
&lt;p class="zlAe0W_TextBase zlAe0W_Text" data-w-component="text" data-w-wrap="normal"&gt;Could you please let me know if I have missed any configuration steps, or advise on how this issue can be resolved?&lt;/p&gt;</description></item><item><title>Conversion of  concept HDL symbol to .olb?</title><link>https://community.cadence.com/thread/66151?ContentTypeID=0</link><pubDate>Thu, 09 Jul 2026 11:11:39 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:b7f5844f-cb5b-4874-ad40-1c6ecb3947a8</guid><dc:creator>BM202607094213</dc:creator><slash:comments>3</slash:comments><comments>https://community.cadence.com/thread/66151?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/66151/conversion-of-concept-hdl-symbol-to-olb/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;I have symbols in concept HDL format (.prt, .ptf, .css, .tag). How can I convert them to .olb?&lt;/p&gt;
&lt;p&gt;Is there any tool?&lt;/p&gt;
&lt;p&gt;i have tried to convert using Allegro project manager. am getting below attached error.&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/109/pastedimage1783595430915v1.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;Kindly suggest the procedure.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Regards,&lt;/p&gt;
&lt;p&gt;Balkis&lt;/p&gt;</description></item><item><title>RE: Conversion of  concept HDL symbol to .olb?</title><link>https://community.cadence.com/thread/1409124?ContentTypeID=1</link><pubDate>Thu, 06 Aug 2026 09:12:04 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:fc778095-9166-426a-880b-85d1c345918a</guid><dc:creator>rg13</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/1409124?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/66151/conversion-of-concept-hdl-symbol-to-olb/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;You may need to connect with respective account owner/manager for this.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>