<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://community.cadence.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Allegro X PCB Editor - Recent Threads</title><link>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor</link><description>Upload your SKILL files here. Give a brief summary of how to best use the SKILL code.</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 16 Oct 2026 11:29:01 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor" /><item><title>Performance Advisor in Allegro X PCB Editor: Identifying and Resolving Database Performance Bottlenecks</title><link>https://community.cadence.com/thread/74712?ContentTypeID=0</link><pubDate>Fri, 16 Oct 2026 11:29:01 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:15d22453-ce44-41e4-86a4-90ed26413a9e</guid><dc:creator>vidhyaparameswari</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/74712?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/74712/performance-advisor-in-allegro-x-pcb-editor-identifying-and-resolving-database-performance-bottlenecks/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Large and complex PCB designs can sometimes experience slower interactive operations, delayed DRC updates, or reduced editing responsiveness. To help diagnose and address these issues, Allegro X PCB Editor includes the &lt;strong&gt;Performance Advisor&lt;/strong&gt;, a diagnostic utility integrated within the &lt;strong&gt;Database Check (DB Doctor)&lt;/strong&gt; workflow.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;What is Performance Advisor?&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;Performance Advisor is a specialized analysis tool that examines the PCB design database and identifies conditions that may contribute to degraded application performance. Instead of manually investigating potential causes, designers can use Performance Advisor to pinpoint database settings, constraint configurations, and design characteristics that may be impacting responsiveness.&lt;/p&gt;
&lt;p&gt;The tool provides actionable recommendations that help improve design efficiency and overall editing performance.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Benefits of Using Performance Advisor&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;By routinely running Performance Advisor, users can:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Identify database-related performance issues before they become critical.&lt;/li&gt;
&lt;li&gt;Detect constraint configurations that may cause slow editing operations.&lt;/li&gt;
&lt;li&gt;Receive practical recommendations for improving design responsiveness.&lt;/li&gt;
&lt;li&gt;Optimize shape handling and database settings for large designs.&lt;/li&gt;
&lt;li&gt;Improve overall PCB layout productivity and user experience.&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;strong&gt;How to Access Performance Advisor&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;Performance Advisor is available through the &lt;strong&gt;Database Check (DB Doctor)&lt;/strong&gt; utility in Allegro X PCB Editor.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Navigation Path:Tools&lt;/strong&gt;&lt;strong&gt;&amp;rarr; Database Check&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;Running Database Check launches the analysis process, where Performance Advisor evaluates the current design and presents any detected performance concerns along with recommended corrective actions.&lt;/p&gt;</description></item><item><title>Differential pair pad entry</title><link>https://community.cadence.com/thread/66334?ContentTypeID=0</link><pubDate>Wed, 16 Sep 2026 15:54:47 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:021c1a73-1079-4746-bb5c-94dcf3b8d87d</guid><dc:creator>YJ202407185547</dc:creator><slash:comments>6</slash:comments><comments>https://community.cadence.com/thread/66334?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/66334/differential-pair-pad-entry/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hi,&amp;nbsp;&lt;/p&gt;
&lt;p&gt;The differential pair entry into a pad in allegro 23.1 was ortogonal&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/28/pastedimage1789573999498v1.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;However, Since I uploaded allegro 25.1 the differential pair entry is different and I&amp;#39;m not able to route it orthogonal to the pad:&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/28/pastedimage1789574067412v2.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;Does anyone know how to change the entry?&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Thank you in advance.&lt;/p&gt;</description></item><item><title>RE: Differential pair pad entry</title><link>https://community.cadence.com/thread/1434913?ContentTypeID=1</link><pubDate>Sun, 11 Oct 2026 05:51:38 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:a33f13de-172a-49ae-9752-9d6c36d09536</guid><dc:creator>excellon1</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/1434913?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/66334/differential-pair-pad-entry/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;There are many moving parts to the Diff- Pairs, One thing worth trying is the miter factor. If this is too low then your etch may not escape the pin and turn to sharply.&lt;/p&gt;
&lt;p&gt;So click on your pin to start your diff pair. In the &amp;quot;Options Pane&amp;quot; check to see if the actual miter is at a minimum 2xwidth. You can change that to a higher value to see how the diff-pair responds. If the Miter is set to something like 1xwidth the etch will turn too sharply and not escape the pins as you want.&lt;/p&gt;
&lt;p&gt;Its&amp;nbsp; also possible to use single trace mode. In that mode you route off the pin a certain distance then&amp;nbsp; left click to stop routing, next right click and uncheck single trace mode. The other pin should route in to match the etch you started.&lt;/p&gt;
&lt;p&gt;So click on pin both diff-pairs appear. Right click and choose &amp;quot;Single Trace mode&amp;quot; Rote off the pin and left click to stop routing. Right click and uncheck &amp;quot;Single Trace mode&amp;quot;&lt;br /&gt;&lt;br /&gt;Let us know if it works.&lt;/p&gt;
&lt;p&gt;More than likely the trouble is related to the miter. A good value for Pad Entry Factor is 75 !&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Exporting Libraries</title><link>https://community.cadence.com/thread/1434903?ContentTypeID=1</link><pubDate>Thu, 08 Oct 2026 11:16:41 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:ca618231-0eab-408d-8672-ea3c2220678b</guid><dc:creator>DW202503105936</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/1434903?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/59002/exporting-libraries/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;I use 24.1 - On my database it was an issue with the text block sizes, I compacted them, and removed the ones which were over block 64, and the issue was resolved.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Exporting Libraries</title><link>https://community.cadence.com/thread/59002?ContentTypeID=0</link><pubDate>Sat, 02 Mar 2024 05:40:38 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:3aad2d89-aa22-4dd1-a613-352973784676</guid><dc:creator>Tahakhan</dc:creator><slash:comments>10</slash:comments><comments>https://community.cadence.com/thread/59002?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/59002/exporting-libraries/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;When I Export libraries using &amp;quot;dlib&amp;quot; it takes a lot of time for some Board files and in the end it won&amp;#39;t even generate after waiting for like 8hours. Is there any way to speed up the process?&lt;/p&gt;
&lt;p&gt;Using allegro 17.2&lt;/p&gt;
&lt;p&gt;I tried 17.4 as shown below but it got stuck on 99% after 3minutes. I assume it will remain stuck.&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/28/pastedimage1709358854030v1.png" alt=" " /&gt;&lt;/p&gt;</description></item><item><title>RE: Differential pair pad entry</title><link>https://community.cadence.com/thread/1434902?ContentTypeID=1</link><pubDate>Thu, 08 Oct 2026 08:01:32 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:96ea07e5-1189-4b8b-b267-19689a8ec75e</guid><dc:creator>steve</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/1434902?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/66334/differential-pair-pad-entry/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Try clicking on the Next button..... you can also type that into the Smart Search...&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Differential pair pad entry</title><link>https://community.cadence.com/thread/1434900?ContentTypeID=1</link><pubDate>Wed, 07 Oct 2026 14:46:56 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:81e2e7b9-f692-423c-94e4-051c06f80da9</guid><dc:creator>YJ202407185547</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/1434900?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/66334/differential-pair-pad-entry/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/28/pastedimage1791384374405v1.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;I don&amp;#39;t see the padentry_factor&amp;nbsp;on user preference&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Differential pair pad entry</title><link>https://community.cadence.com/thread/1434899?ContentTypeID=1</link><pubDate>Wed, 07 Oct 2026 13:48:57 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:b3968709-5f40-4999-888c-b1bac4ea474d</guid><dc:creator>steve</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/1434899?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/66334/differential-pair-pad-entry/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Have a look at Setup - User Preferences - Route - Connect and padentry_factor. This may help.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Differential pair pad entry</title><link>https://community.cadence.com/thread/1434895?ContentTypeID=1</link><pubDate>Wed, 07 Oct 2026 10:28:43 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:fc611003-a9e8-4a76-8116-ed1c9085dd2b</guid><dc:creator>YJ202407185547</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/1434895?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/66334/differential-pair-pad-entry/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;&lt;span&gt;DRC is because of the angle that the&amp;nbsp;&lt;/span&gt;&lt;span&gt;trace is &lt;/span&gt;&lt;span&gt;routed into the pin&amp;nbsp;&lt;/span&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/28/pastedimage1791368734787v1.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;But that&amp;#39;s why I&amp;#39;m asking help, I&amp;#39;m not able to change the entry of the trace into the pin, the steps you told me does not help me&amp;nbsp;with my problem.&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: pin is shifted after generating gerber file</title><link>https://community.cadence.com/thread/1434894?ContentTypeID=1</link><pubDate>Tue, 06 Oct 2026 15:45:47 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:33a16fec-c60d-4899-838b-43b6f29e9c9a</guid><dc:creator>John T</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/1434894?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/74689/pin-is-shifted-after-generating-gerber-file/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hi Siri, can you send us an image of the layout are with all layers visible? Is it possible that your artwork layer setup possibly has an incorrect layer inside. Has everything offset or just one pad?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>pin is shifted after generating gerber file</title><link>https://community.cadence.com/thread/74689?ContentTypeID=0</link><pubDate>Tue, 06 Oct 2026 05:54:15 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:41723107-04a4-4fdc-a779-6b5c0f4f0e7f</guid><dc:creator>Siri</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/74689?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/74689/pin-is-shifted-after-generating-gerber-file/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;The cusom pin is shifted in the gerber, it looks fine and on the board and footprint it is shifter in the gerber&lt;/p&gt;
&lt;p&gt;&lt;a href="https://community.cadence.com/resized-image/__size/190x278/__key/communityserver-discussions-components-files/28/pastedimage1791265964025v2.png"&gt;/resized-image/__size/190x278/__key/communityserver-discussions-components-files/28/pastedimage1791265964025v2.png&lt;/a&gt; file&lt;/p&gt;
&lt;p&gt;&lt;a href="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/28/pastedimage1791266009937v3.png"&gt;/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/28/pastedimage1791266009937v3.png&lt;/a&gt;&lt;/p&gt;</description></item><item><title>Airgap is reduced after uprev</title><link>https://community.cadence.com/thread/70341?ContentTypeID=0</link><pubDate>Mon, 28 Sep 2026 05:30:52 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:9deef923-eb27-4b42-8a3f-49e0bb1a33b6</guid><dc:creator>Siri</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/70341?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/70341/airgap-is-reduced-after-uprev/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p class="x1yc453h xma8rkl xgoqxah xutxfr x1fie51u xgyxj25 x1xobyvs x1elgs31 x1fv8qjw xcy5tzr x1ht4adc xnvauns x1c2l018 x14l7nz5 xuw7688 x1pjt2rx x160d6zm xrxpjvj" dir="ltr"&gt;Hello,&lt;/p&gt;
&lt;p class="x1yc453h xma8rkl xgoqxah xutxfr x1fie51u xgyxj25 x1xobyvs x1elgs31 x1fv8qjw xcy5tzr x1ht4adc xnvauns x1c2l018 x14l7nz5 xuw7688 x1pjt2rx x160d6zm xrxpjvj" dir="ltr"&gt;After upgrading from version 16.6 to 24.1, the airgap is getting reduced automatically.&lt;/p&gt;
&lt;p class="x1yc453h xma8rkl xgoqxah xutxfr x1fie51u xgyxj25 x1xobyvs x1elgs31 x1fv8qjw xcy5tzr x1ht4adc xnvauns x1c2l018 x14l7nz5 xuw7688 x1pjt2rx x160d6zm xrxpjvj" dir="ltr"&gt;Could you please let me know what could be causing this behaviour? Is there any setting or change in the newer version that could affect the airgap?&lt;/p&gt;
&lt;p class="x1yc453h xma8rkl xgoqxah xutxfr x1fie51u xgyxj25 x1xobyvs x1elgs31 x1fv8qjw xcy5tzr x1ht4adc xnvauns x1c2l018 x14l7nz5 xuw7688 x1pjt2rx x160d6zm xrxpjvj" dir="ltr"&gt;Thanks&lt;/p&gt;
&lt;p class="x1yc453h xma8rkl xgoqxah xutxfr x1fie51u xgyxj25 x1xobyvs x1elgs31 x1fv8qjw xcy5tzr x1ht4adc xnvauns x1c2l018 x14l7nz5 xuw7688 x1pjt2rx x160d6zm xrxpjvj" dir="ltr"&gt;&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" alt=" " src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/28/airgap_5F00_17.2.png" /&gt;&lt;/p&gt;
&lt;p class="x1yc453h xma8rkl xgoqxah xutxfr x1fie51u xgyxj25 x1xobyvs x1elgs31 x1fv8qjw xcy5tzr x1ht4adc xnvauns x1c2l018 x14l7nz5 xuw7688 x1pjt2rx x160d6zm xrxpjvj" dir="ltr"&gt;&lt;/p&gt;
&lt;p class="x1yc453h xma8rkl xgoqxah xutxfr x1fie51u xgyxj25 x1xobyvs x1elgs31 x1fv8qjw xcy5tzr x1ht4adc xnvauns x1c2l018 x14l7nz5 xuw7688 x1pjt2rx x160d6zm xrxpjvj" dir="ltr"&gt;&lt;img style="max-height:480px;max-width:640px;" alt=" " src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/28/airgap_5F00_24.png" /&gt;&lt;/p&gt;
&lt;p class="x1yc453h xma8rkl xgoqxah xutxfr x1fie51u xgyxj25 x1xobyvs x1elgs31 x1fv8qjw xcy5tzr x1ht4adc xnvauns x1c2l018 x14l7nz5 xuw7688 x1pjt2rx x160d6zm xrxpjvj" dir="ltr"&gt;&lt;/p&gt;
&lt;p class="x1yc453h xma8rkl xgoqxah xutxfr x1fie51u xgyxj25 x1xobyvs x1elgs31 x1fv8qjw xcy5tzr x1ht4adc xnvauns x1c2l018 x14l7nz5 xuw7688 x1pjt2rx x160d6zm xrxpjvj" dir="ltr"&gt;&lt;/p&gt;
&lt;p class="x1yc453h xma8rkl xgoqxah xutxfr x1fie51u xgyxj25 x1xobyvs x1elgs31 x1fv8qjw xcy5tzr x1ht4adc xnvauns x1c2l018 x14l7nz5 xuw7688 x1pjt2rx x160d6zm xrxpjvj" dir="ltr"&gt;&lt;/p&gt;
&lt;p class="x1yc453h xma8rkl xgoqxah xutxfr x1fie51u xgyxj25 x1xobyvs x1elgs31 x1fv8qjw xcy5tzr x1ht4adc xnvauns x1c2l018 x14l7nz5 xuw7688 x1pjt2rx x160d6zm xrxpjvj" dir="ltr"&gt;&lt;/p&gt;</description></item><item><title>RE: Airgap is reduced after uprev</title><link>https://community.cadence.com/thread/1434849?ContentTypeID=1</link><pubDate>Thu, 01 Oct 2026 11:21:06 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:019db0a1-5030-46e5-a0a6-68ee890be5e8</guid><dc:creator>mahimag</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/1434849?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/70341/airgap-is-reduced-after-uprev/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hi &lt;a href="https://community.cadence.com/members/siri"&gt;Siri&lt;/a&gt;&amp;nbsp;, After the update, have you tried running Database check (Tools &amp;gt; Database Check) once? Also, make sure the shapes are up to date.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;If it is still an issue, I might need to look at the database. Let me know if you can share the database and I can contact you through separate channel.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Elevate your Expertise- Learn how waves form and interact across your board, unlocking the secrets to improved signal integrity, power integrity, and EMC performance in your designs.</title><link>https://community.cadence.com/thread/70346?ContentTypeID=0</link><pubDate>Tue, 29 Sep 2026 05:19:37 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:bb8cadf3-a2b5-4b51-8ad2-805adbc55cd1</guid><dc:creator>Renu Vibha</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/70346?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/70346/elevate-your-expertise--learn-how-waves-form-and-interact-across-your-board-unlocking-the-secrets-to-improved-signal-integrity-power-integrity-and-emc-performance-in-your-designs/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;&lt;span&gt;As edge rates continue to rise, traditional design rules fall short. In this on-demand webinar, you&amp;#39;ll discover a physics-based framework to understand the behavior of electromagnetic fields within PCB structures.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Watch now and elevate your expertise!&amp;nbsp;&amp;nbsp;&lt;/span&gt;&lt;a href="https://www.cadence.com/en_US/home/resources/on-demand-webinars/field-based-perspective-pcb-design.html?utm_campaign=cpgmkting_allegro_webinars_ww&amp;amp;utm_medium=cta&amp;amp;utm_source=forum"&gt;Webinar Recording&lt;/a&gt;&lt;/p&gt;</description></item><item><title>trimming a shape corner</title><link>https://community.cadence.com/thread/65000?ContentTypeID=0</link><pubDate>Thu, 24 Jul 2025 23:10:34 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:5fa43807-43ad-4081-aa14-894f52384121</guid><dc:creator>masamasa</dc:creator><slash:comments>11</slash:comments><comments>https://community.cadence.com/thread/65000?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65000/trimming-a-shape-corner/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;hello:&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;on a rectangular shape, is there a way to trim one corner instead of trimming all 4 corners?&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;regards&lt;/p&gt;
&lt;p&gt;masa&lt;/p&gt;</description></item><item><title>RE: trimming a shape corner</title><link>https://community.cadence.com/thread/1409380?ContentTypeID=1</link><pubDate>Wed, 23 Sep 2026 19:49:13 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:ec5f1fc3-cec7-4691-be5c-11212d39a217</guid><dc:creator>BM202507107724</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/1409380?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/65000/trimming-a-shape-corner/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Thanks FaPb!!! This is the critical step. This will not work without &amp;quot;Other segs&amp;quot; selected. Having just &amp;quot;Shapes&amp;quot; selected will not invoke the small cross when hovering.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Markups</title><link>https://community.cadence.com/thread/1409370?ContentTypeID=1</link><pubDate>Wed, 23 Sep 2026 12:59:30 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:5743c15a-7c70-40ff-bb3f-5ec8e7a2f3cf</guid><dc:creator>Bennigin</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/1409370?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/66350/markups/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;I opened the example design &amp;quot;Cadence_Demo.brd&amp;quot; and got the same result in both versions 24.1 and 25.1. Also, happens with all my designs.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Markups</title><link>https://community.cadence.com/thread/66350?ContentTypeID=0</link><pubDate>Wed, 23 Sep 2026 12:33:17 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:8121b191-2795-43ad-b4e4-5fc613189343</guid><dc:creator>Bennigin</dc:creator><slash:comments>2</slash:comments><comments>https://community.cadence.com/thread/66350?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/66350/markups/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;When trying to add a Markup to my design, PCB editor crashes when I click submit. Anyone else seen this issue and found the solution? I have tried it using version 24.1-2024-S010 and 25.1-2025-S050.&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/28/pastedimage1790166784504v1.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Thanks&lt;/p&gt;</description></item><item><title>RE: Markups</title><link>https://community.cadence.com/thread/1409369?ContentTypeID=1</link><pubDate>Wed, 23 Sep 2026 12:52:42 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:0536df55-fcae-4f17-aa26-97038e21c88d</guid><dc:creator>Jeet</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/1409369?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/66350/markups/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Could you check whether this issue is specific to a particular board or occurs with all board designs? Please test with a board file available at C:\Cadence\SPB_25.1\share\pcb\examples\board_design and let us know whether you encounter the crash.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Differential pair pad entry</title><link>https://community.cadence.com/thread/1409357?ContentTypeID=1</link><pubDate>Mon, 21 Sep 2026 21:51:09 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:3cbc22db-31dc-4ebe-a04e-0bb407ac1eb4</guid><dc:creator>excellon1</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/1409357?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/66334/differential-pair-pad-entry/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hi in your second picture you have DRC&amp;#39;s so there may be spacing issues with the trace to pad on the left side. What DRC&amp;#39;s are reported ?.&lt;/p&gt;
&lt;p&gt;There are a couple of methods to route in diff-pairs, Regardless of the etch style, When you route off the pin it should typically look like what you have in the first picture.&lt;br /&gt;Since the pins in pic 2 are fairly close try this.&amp;nbsp; click on the pin and route off the pin a short distance then left click to stop routing. Next right click and choose target &amp;gt; route from target and you should see the etch auto start from the other end of the diffpair. Continue routing to join the etch up.&lt;br /&gt;&lt;br /&gt;Where the etch comes off the pin it should gather the same as each end of the net.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to Use Allegro Text Blocks as the Default Font Instead of TrueType Fonts in 25.1 ?</title><link>https://community.cadence.com/thread/1409350?ContentTypeID=1</link><pubDate>Mon, 21 Sep 2026 12:46:05 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:b0bf422b-1e86-4837-bc0a-8a607b6c9b3c</guid><dc:creator>Electro Node</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/1409350?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/66335/how-to-use-allegro-text-blocks-as-the-default-font-instead-of-truetype-fonts-in-25-1/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Thankyou so much! It helps.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>How to Use Allegro Text Blocks as the Default Font Instead of TrueType Fonts in 25.1 ?</title><link>https://community.cadence.com/thread/66335?ContentTypeID=0</link><pubDate>Thu, 17 Sep 2026 06:01:12 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:33c94f71-5dde-4c4b-b13c-415dcf126f34</guid><dc:creator>Electro Node</dc:creator><slash:comments>3</slash:comments><comments>https://community.cadence.com/thread/66335?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/66335/how-to-use-allegro-text-blocks-as-the-default-font-instead-of-truetype-fonts-in-25-1/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hello Everyone,&lt;/p&gt;
&lt;p&gt;I&amp;rsquo;m looking for a way to use Allegro Text Blocks as the default font for newly created text instead of TrueType Fonts (TTF).&lt;/p&gt;
&lt;p&gt;Is there a configuration, environment setting, or recommended workflow that allows all new text to automatically use Text Blocks by default?&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Thanks!&lt;/p&gt;</description></item><item><title>RE: How to Use Allegro Text Blocks as the Default Font Instead of TrueType Fonts in 25.1 ?</title><link>https://community.cadence.com/thread/1409341?ContentTypeID=1</link><pubDate>Thu, 17 Sep 2026 10:38:46 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:0dc8c97d-2da6-4f76-b33f-8569b7e1c2dd</guid><dc:creator>SD202609175414</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/1409341?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/66335/how-to-use-allegro-text-blocks-as-the-default-font-instead-of-truetype-fonts-in-25-1/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Absolutely TTF Fonts are required in the next generation for future development.&lt;/p&gt;
&lt;p&gt;&amp;lt;a href=&amp;quot;google.com&amp;quot;&amp;gt;google&amp;lt;/a&amp;gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How to Use Allegro Text Blocks as the Default Font Instead of TrueType Fonts in 25.1 ?</title><link>https://community.cadence.com/thread/1409340?ContentTypeID=1</link><pubDate>Thu, 17 Sep 2026 10:36:13 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:e5d0826b-56dc-48bd-9c2d-0c793b480711</guid><dc:creator>oldmouldy</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/1409340?ContentTypeID=1</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/66335/how-to-use-allegro-text-blocks-as-the-default-font-instead-of-truetype-fonts-in-25-1/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Go to Setup&amp;gt;User Preferences, UI, General, text_controls_options_tab is the variable, values are: Blank, TTF; Font Styles, TTF; Text Blocks, old style &amp;quot;vector&amp;quot; fonts; Both&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Cut iterations. Converge faster. Design smarter with Cadence Agentic AI. Join us on 16 September 2026</title><link>https://community.cadence.com/thread/66304?ContentTypeID=0</link><pubDate>Thu, 03 Sep 2026 07:11:44 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:d5979c84-dcd6-4a83-b773-07571ee4d3da</guid><dc:creator>Renu Vibha</dc:creator><slash:comments>2</slash:comments><comments>https://community.cadence.com/thread/66304?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/66304/cut-iterations-converge-faster-design-smarter-with-cadence-agentic-ai-join-us-on-16-september-2026/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Join this Cadence webinar to learn how teams are leveraging &lt;strong&gt;Agentic AI&lt;/strong&gt; to shorten iteration cycles, improve convergence, and tackle complex design challenges faster.&lt;/p&gt;
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