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<?xml-stylesheet type="text/xsl" href="https://community.cadence.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>PSpice - Recent Threads</title><link>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice</link><description /><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 29 Oct 2026 15:44:09 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice" /><item><title>PSpice for TI installer fails: HTTP 403 Forbidden downloading TI_URLs.txt</title><link>https://community.cadence.com/thread/74751?ContentTypeID=0</link><pubDate>Thu, 29 Oct 2026 15:44:09 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:e783ddee-da2b-4336-8c19-758184f83398</guid><dc:creator>ZS202610299347</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/74751?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/74751/pspice-for-ti-installer-fails-http-403-forbidden-downloading-ti_urls-txt/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hello Cadence Support,&lt;/p&gt;
&lt;p&gt;I am unable to install PSpice for TI because the installer cannot download its configuration file.&lt;/p&gt;
&lt;p&gt;Installer message:&lt;br /&gt;&amp;quot;Unable to access the URL required for installation&amp;quot;&lt;/p&gt;
&lt;p&gt;Failing URL:&lt;br /&gt;&lt;a href="https://pcb.cadence.com/startPages/PSpiceTI_data/TI_URLs.txt"&gt;pcb.cadence.com/.../TI_URLs.txt&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;The same URL returns HTTP 403 Forbidden when accessed directly outside the installer.&lt;/p&gt;
&lt;p&gt;Observed response details:&lt;br /&gt;- Server: CloudFront&lt;br /&gt;- X-Cache: Error from cloudfront&lt;br /&gt;- HTTP status: 403 Forbidden&lt;/p&gt;
&lt;p&gt;The installer&amp;rsquo;s network check reports that Internet connectivity and TLS 1.2 are available, and that proxy credentials are not required. The problem has been reproduced repeatedly.&lt;/p&gt;
&lt;p&gt;Could you please confirm whether access to this object has been intentionally restricted or misconfigured, and either restore access or provide the current official installation procedure / replacement endpoint for PSpice for TI?&lt;/p&gt;
&lt;p&gt;I can provide the installer log (cdsPspiceTIlog.txt) if needed.&lt;/p&gt;
&lt;p&gt;Thank you.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>PSpice for TI Installation Fails - HTTP 403 Forbidden</title><link>https://community.cadence.com/thread/74748?ContentTypeID=0</link><pubDate>Tue, 27 Oct 2026 15:54:52 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:4d24d89e-fd28-462b-82d3-881bd7ede24f</guid><dc:creator>BK202610272117</dc:creator><slash:comments>3</slash:comments><comments>https://community.cadence.com/thread/74748?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/74748/pspice-for-ti-installation-fails---http-403-forbidden/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;&lt;span&gt;Hello Cadence Support,&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;I am trying to install PSpice for TI after receiving my approved access key from Texas Instruments.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;The installer fails with this error:&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;&lt;span&gt;Error Code:&lt;/span&gt;&lt;/strong&gt;&lt;span&gt; HTTP 403 Forbidden&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;&lt;span&gt;URL:&lt;/span&gt;&lt;/strong&gt;&lt;span&gt; &lt;/span&gt;&lt;a href="https://pcb.cadence.com/startPages/PSpiceTI_data/TI_URLs.txt" data-rich-text-autolink=""&gt;&lt;span&gt;https://pcb.cadence.com/startPages/PSpiceTI_data/TI_URLs.txt&lt;/span&gt;&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;The same URL returns HTTP 403 Forbidden when accessed directly through a web browser.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Our IT department has tested multiple computers and reviewed our network security policies without finding a restriction responsible for the failure.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Could you please verify whether this configuration file is accessible on the Cadence server and provide a solution or updated installation procedure?&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Thank you.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/110/pastedimage1793116465603v1.png" alt=" " /&gt;&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>How can I export and view PSpice simulation results in MATLAB?</title><link>https://community.cadence.com/thread/74742?ContentTypeID=0</link><pubDate>Mon, 26 Oct 2026 13:48:03 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:7fad3b4a-6a6b-426e-8589-0ad3d99721f1</guid><dc:creator>IshaS</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/74742?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/74742/how-can-i-export-and-view-pspice-simulation-results-in-matlab/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;&lt;strong&gt;&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;Allegro PSpice Simulator provides an interface with MATLAB that allows you to export simulation waveform data for advanced plotting, visualization, and further analysis.&lt;/p&gt;
&lt;p&gt;After running the PSpice simulation and plotting the required traces, configure the MATLAB installation path using:&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Tools&amp;gt; MATLAB &amp;gt;Set MATLAB Path&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/110/pastedimage1793022419943v1.png" alt=" " /&gt;&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;Set the path to:&lt;/p&gt;
&lt;p&gt;&amp;lt;MATLAB installation&amp;gt;\bin&lt;/p&gt;
&lt;p&gt;To export simulation data, go to:&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Tools &amp;gt; MATLAB &amp;gt;Export Selected Traces&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;The &lt;strong&gt;Export to MATLAB&lt;/strong&gt; window allows you to:&lt;/p&gt;
&lt;ol&gt;
&lt;li&gt;Select one or more traces for export.&lt;/li&gt;
&lt;li&gt;View simulation variables in Flat or Hierarchical format.&lt;/li&gt;
&lt;li&gt;Select the required section for multi-section simulations.&lt;/li&gt;
&lt;li&gt;Specify a MATLAB variable name for the exported data.&lt;/li&gt;
&lt;li&gt;Use the default plotTraces function to visualize the traces in MATLAB.&lt;/li&gt;
&lt;/ol&gt;
&lt;p&gt;Click &lt;strong&gt;Export&lt;/strong&gt; to transfer the selected trace data to MATLAB. If no variable name is provided, PSpice automatically creates a variable such as:&lt;/p&gt;
&lt;p&gt;PSpiceData_&amp;lt;instance number&amp;gt;&lt;/p&gt;
&lt;p&gt;You can then use MATLAB functions for customized waveform analysis, including advanced plots such as polar and 3D plots.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;Happy Learning!!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Electrothermal model in MbreakN or other mosfet models?</title><link>https://community.cadence.com/thread/74730?ContentTypeID=0</link><pubDate>Wed, 21 Oct 2026 08:05:07 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:4351b3b8-df31-43cd-ae12-0473998c576d</guid><dc:creator>US202607259240</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/74730?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/74730/electrothermal-model-in-mbreakn-or-other-mosfet-models/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hello, I am trying to simulate electrothermal model in MOSFET for MbreakN model found in Pspice, however, I couldn&amp;#39;t find a way to connect this component with a self built RC cauer model. I came to an understanding that the dynamic temperature cannot be passed as argument in MbreakN. Is there any way to do this, or any model which already has existing integrated electrothermal coupling where other parameters could be varied arbitarily? I have found some specific industrial models designed for their own products but I want to know if it is possible in some arbitary models. So far I have used ABM to model a simple MOS equation with cauer model connected to it, but this could increase the difficulty when a compact MOSFET model is required.&amp;nbsp;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Thank you.&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Share Insights: Differential Impedance for an OPAMP</title><link>https://community.cadence.com/thread/74716?ContentTypeID=0</link><pubDate>Mon, 19 Oct 2026 10:57:20 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:0b9ad41c-9b92-4395-b535-880073db8372</guid><dc:creator>IshaS</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/74716?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/74716/share-insights-differential-impedance-for-an-opamp/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;You want to characterize how an OPAMP&amp;rsquo;s differential input impedance changes with frequency.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Which PSpice setup is most appropriate?&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/110/pastedimage1792407398657v2.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;A. Use a 1 A AC current source across the differential input, perform an AC frequency sweep, and evaluate Vdiff/IAC&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;br /&gt; B. Apply a DC voltage source and perform Transient analysis&lt;/p&gt;
&lt;p&gt;&lt;br /&gt; C. Run a DC Sweep and plot the output voltage only&lt;/p&gt;
&lt;p&gt;&lt;br /&gt; D. Apply a sinusoidal source and calculate only the voltage gain&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Try this and share your observations.&lt;br /&gt;Happy Learning!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>PSpice Special Components: IPRINT, IPLOT</title><link>https://community.cadence.com/thread/70348?ContentTypeID=0</link><pubDate>Tue, 29 Sep 2026 16:13:51 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:2de100a1-b66e-41af-b5e3-691dfde4fbee</guid><dc:creator>AyushD</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/70348?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/70348/pspice-special-components-iprint-iplot/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;&lt;span style="font-size:150%;"&gt;&lt;strong&gt;IPRINT&lt;/strong&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Use this component to print current through a specific device in your simulation output file. This component works like an ammeter. To print current through a specific device you need to insert this component in series. This component enables you to print current through the device in simulation output (&lt;/span&gt;&lt;code&gt;.out&lt;/code&gt;&lt;span&gt;) file.&amp;nbsp;In below image,&lt;code&gt;IPRINT&lt;/code&gt; lists current in tabular format through the device &lt;code&gt;R_LOAD&lt;/code&gt;.&lt;br /&gt;&lt;br /&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/110/pastedimage1790697954985v1.png" alt=" " /&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;You need to configure one or more parameters on this symbol instance from following list to use this in simulation flow.&lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Analysis Type: Assign any value to one of the variables &lt;code&gt;AC&lt;/code&gt;/&lt;code&gt;DC&lt;/code&gt;/&lt;code&gt;TRAN&lt;/code&gt;, depending upon the analysis you are performing. For example if your simulation profile is configured for Transient Analysis you should set &lt;code&gt;TRAN&lt;/code&gt; property value as 1.&lt;/li&gt;
&lt;li&gt;Functions: You can use following special function on output nodes
&lt;ul&gt;
&lt;li&gt;&lt;code&gt;DB&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;&lt;code&gt;PHASE&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;&lt;code&gt;REAL&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;&lt;code&gt;MAG&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;&lt;code&gt;IMAG&lt;/code&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;br /&gt;&lt;span style="font-size:inherit;"&gt;You can use one or more of the parameters at a time. To select these you need to assign any value to these parameter, say, &lt;code&gt;1&lt;/code&gt;.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;For example if you have set &lt;code&gt;DB&lt;/code&gt; and &lt;code&gt;PHASE&lt;/code&gt; values to 1 on symbol instance and this component is connected to node &lt;code&gt;VOUT&lt;/code&gt;, it will print following in output file:&lt;br /&gt;&lt;br /&gt;&lt;code&gt;DB of Voltage at VOUT node&lt;/code&gt;&lt;br /&gt;&lt;code&gt;PHASE of Voltage at VOUT node&lt;/code&gt;&lt;/p&gt;
&lt;p&gt;&lt;code&gt;&lt;/code&gt;&lt;/p&gt;
&lt;p&gt;&lt;span style="font-size:150%;"&gt;&lt;strong&gt;&lt;code&gt;IPLOT&lt;/code&gt;&lt;/strong&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Use this component to plot current through a specific device in your simulation output file. This works identical to IPRINT, only difference being that it generates PLOT instead of tabular data.&lt;/span&gt;&lt;code&gt;&lt;/code&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>ERROR(ORCOMMN-2302): Cannot initialize profile.</title><link>https://community.cadence.com/thread/66336?ContentTypeID=0</link><pubDate>Thu, 17 Sep 2026 06:40:46 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:78eecb1b-c785-418e-b91b-44148c59b1ed</guid><dc:creator>VolkerD</dc:creator><slash:comments>4</slash:comments><comments>https://community.cadence.com/thread/66336?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/66336/error-orcommn-2302-cannot-initialize-profile/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hello everyone,&lt;/p&gt;
&lt;p&gt;after updating from Orcad X 24.1 to 25.1 I get the error message&lt;span&gt;&amp;nbsp;&amp;quot;ERROR(ORCOMMN-2302): Cannot initialize profile.&amp;quot; when I want to create a new Pspice simulation profile.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Same when I open an old project from 24.1 with 25.1.&amp;nbsp;No problem when using 24.1. Latest Hotfix is installed&lt;br /&gt;&lt;br /&gt;Any ideas how to solve this? Thanks in advance!&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Improving Fourier (FFT) Accuracy in PSpice</title><link>https://community.cadence.com/thread/66320?ContentTypeID=0</link><pubDate>Wed, 09 Sep 2026 19:12:13 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:fc7b3afc-1a36-41f2-844a-8efe8426ee8d</guid><dc:creator>IshaS</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/66320?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/66320/improving-fourier-fft-accuracy-in-pspice/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;In PSpice, you can often improve the accuracy of your Fourier (spectral) analysis by&amp;nbsp;modifying your transient analysis setup.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;div&gt;Accurate Fourier analysis in PSpice depends on selecting appropriate &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;transient&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;simulation&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;settings.&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;The&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;quality&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;of&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;the&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;FFT&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;is&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;directly&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;influenced&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;by&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;the&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;simulation&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;duration,&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;time-step&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;resolution,&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;and&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;overall&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;numerical&lt;/span&gt; &lt;span class="___1cs5bdp f1w7gpdv f5p0z4x"&gt;accuracy.&lt;/span&gt;&lt;/div&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Here are some guidelines for getting&amp;nbsp;more accurate results:&lt;/p&gt;
&lt;p&gt;_Final Time_&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:52px;max-width:136px;" height="52" src="https://community.cadence.com/resized-image/__size/272x104/__key/communityserver-discussions-components-files/110/pastedimage1788980927959v1.png" width="136" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;where Tss = Time to reach steady state.&lt;/p&gt;
&lt;p&gt;The output must reach steady-state before you can even begin to look at the&amp;nbsp;data. Otherwise, the signal is not periodic, and it will introduce noise in&amp;nbsp;the Fourier transform. You can set the No-Print Delay (from the Analysis menu, choose Setup, then&amp;nbsp;click Transient) to Tss to avoid having to restrict the data when using the&amp;nbsp;FFT feature of Probe. Although the simulation still begins at Time=0, No-Print&amp;nbsp;Delay effectively truncates the leading portion of the data file, making it&amp;nbsp;smaller without affecting the accuracy of the FFT.&lt;/p&gt;
&lt;p&gt;N = Integer number of cycles to be transformed (Frequency domain resolution =&amp;nbsp;F0/N)&lt;/p&gt;
&lt;p&gt;It is usually best to use 5 or more cycles; the magnitude of the frequency&amp;nbsp;components between harmonics (which should be zero) gives you an idea of what&amp;nbsp;the effective noise-floor of the transform is.&lt;/p&gt;
&lt;p&gt;F0 = Fundamental frequency&lt;/p&gt;
&lt;p&gt;In multi-tone analyses, F0 is the highest frequency of which all input&amp;nbsp;frequencies are integer multiples, i.e., F0 = Fi / Ni for all input&amp;nbsp;frequencies Fi, where Ni are arbitrary integers. If you are using the Fourier&amp;nbsp;Analysis function of PSpice, then you should specify the fundamental frequency&amp;nbsp;as F0/N to get the frequency resolution discussed above.&lt;/p&gt;
&lt;p&gt;_Step Ceiling (and Print Step)_&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:48px;max-width:239px;" height="48" src="https://community.cadence.com/resized-image/__size/478x96/__key/communityserver-discussions-components-files/110/pastedimage1788980959957v2.png" width="239" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;Nfh = Highest harmonic component with a &amp;quot;significant&amp;quot; amplitude.&lt;/p&gt;
&lt;p&gt;The Nfh&amp;nbsp;component must be well resolved, at about 25-100 points per cycle (Ntres).&amp;quot;Significant&amp;quot; indicates relative amplitude compared to components to be&amp;nbsp;measured.For example, consider a 1kHz sine wave into a highly nonlinear system. To&amp;nbsp;study the first 5 harmonics, set the Step Ceiling (and Print Step) to&amp;nbsp;1/(5*1kHz*25)=8us. However, if the accuracy required is 1mV, and one of the&amp;nbsp;neglected higher harmonics is greater than 1mV, then the higher harmonic&amp;nbsp;component can &amp;quot;fold back&amp;quot; (a kind of aliasing) and disrupt the accuracy of the&amp;nbsp;harmonics being measured.&lt;/p&gt;
&lt;p&gt;25 This range was derived empirically, but it is interesting to note that if&amp;nbsp;one period of a sine wave is represented by 25 evenly spaced points with&amp;nbsp;linear interpolation, then the maximum possible error is approximately 0.8%,and with 100 points, the maximum error is approximately 0.05%.&lt;/p&gt;
&lt;p&gt;_Simulation Accuracy_&lt;/p&gt;
&lt;p&gt;Simulation accuracy is limited to about 3-3.5 digits (60-70dBc). The accuracy&amp;nbsp;can be improved by tightening tolerances and taking the above considerations&amp;nbsp;to extremes, but not by very much. This may not be considered sufficient for&amp;nbsp;some applications, but keep in mind that even the best simulation models are&amp;nbsp;probably not accurate enough to provide better results.&lt;/p&gt;
&lt;p&gt;Do share your insights which one from the above helped !!.&lt;/p&gt;
&lt;p&gt;Happy Learning.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>problems with smoke simulation</title><link>https://community.cadence.com/thread/66316?ContentTypeID=0</link><pubDate>Mon, 07 Sep 2026 10:30:11 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:79cbd274-0fc9-463f-8809-27c5e6fe147f</guid><dc:creator>digital1</dc:creator><slash:comments>4</slash:comments><comments>https://community.cadence.com/thread/66316?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/66316/problems-with-smoke-simulation/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;I have a simple resistive circuit R1 and R2, R2 comes from the menu Place / PSpice Part/ Resistor and R1 comes from my CIS Cip database.&lt;/p&gt;
&lt;p&gt;I have all the smoke parameters set up the same but for the R1 I have &lt;br /&gt;the following non fatal errors&lt;/p&gt;
&lt;p&gt;Voltage Data not found for smoke test RV&lt;/p&gt;
&lt;p&gt;Please verify save data and data collections options in the simulation profile&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;R2 gives me the voltage data expressed as RV but R1 from my cip database does not&lt;/p&gt;
&lt;p&gt;Has anybody else found this error and if so how do&amp;nbsp;I correct it&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Wrong JFET parameters when using nested param .DC sweep</title><link>https://community.cadence.com/thread/66252?ContentTypeID=0</link><pubDate>Mon, 10 Aug 2026 08:04:28 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:a75a53b7-617a-4704-b34f-2d0eddda0f1b</guid><dc:creator>MK202608101044</dc:creator><slash:comments>2</slash:comments><comments>https://community.cadence.com/thread/66252?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/66252/wrong-jfet-parameters-when-using-nested-param-dc-sweep/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hello, I didn&amp;#39;t find a bug reporting feature, so I will try here.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;When simulating a TEMP sweep I stumbled across a bug with njf model. Its parameters get calculated differently based on the chosen sweep type. I created a minimal example here:&lt;/p&gt;
&lt;p&gt;Input:&lt;/p&gt;
&lt;blockquote&gt;
&lt;p&gt;&lt;code&gt;.param vd_p=0&lt;/code&gt;&lt;/p&gt;
&lt;p&gt;&lt;code&gt;vd d 0 {vd_p}&lt;/code&gt;&lt;/p&gt;
&lt;p&gt;&lt;code&gt;j1 d 0 0 myjfet&lt;/code&gt;&lt;/p&gt;
&lt;p&gt;&lt;code&gt;.model myjfet njf t_measured=25&lt;/code&gt;&lt;/p&gt;
&lt;p&gt;&lt;code&gt;.dc TEMP LIST -50 -25 0 25 50 75 100 125 150 175 200 ; param vd_p 0 1 1&lt;/code&gt;&lt;/p&gt;
&lt;/blockquote&gt;
&lt;p&gt;Output:&lt;/p&gt;
&lt;blockquote&gt;
&lt;p&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current -50 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB 1.064E+00 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current -25 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB 1.044E+00 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current 0 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB 1.022E+00 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current 25 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB 1.000E+00 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current 50 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB 9.767E-01 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current 75 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB 9.526E-01 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current 100 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB 9.277E-01 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current 125 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB 9.019E-01 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current 150 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB 8.755E-01 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current 175 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB 8.484E-01 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current 200 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB 8.206E-01 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current 27 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB 9.982E-01 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;/p&gt;
&lt;/blockquote&gt;
&lt;p&gt;This&amp;nbsp;example produces normal results. However, if I add a nested parameter sweep, the calculated JFET parameters are wrong, resulting even in an error.&lt;/p&gt;
&lt;p&gt;Input:&lt;/p&gt;
&lt;blockquote&gt;
&lt;p&gt;&lt;code&gt;.param vd_p=0&lt;/code&gt;&lt;/p&gt;
&lt;p&gt;&lt;code&gt;vd d 0 {vd_p}&lt;/code&gt;&lt;/p&gt;
&lt;p&gt;&lt;code&gt;j1 d 0 0 myjfet&lt;/code&gt;&lt;/p&gt;
&lt;p&gt;&lt;code&gt;.model myjfet njf t_measured=25&lt;/code&gt;&lt;/p&gt;
&lt;p&gt;&lt;code&gt;.dc TEMP LIST -50 -25 0 25 50 75 100 125 150 175 200 param vd_p 0 1 1&lt;/code&gt;&lt;/p&gt;
&lt;/blockquote&gt;
&lt;p&gt;Output:&lt;/p&gt;
&lt;blockquote&gt;
&lt;p&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current -50 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB 1.064E+00 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current -25 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB 1.097E+00 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current 0 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB 1.111E+00 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current 25 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB 1.111E+00 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current 50 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB 1.097E+00 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current 75 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB 1.066E+00 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current 100 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB 1.010E+00 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current 125 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB 9.157E-01 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current 150 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB 7.558E-01 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current 175 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB 4.814E-01 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt;ERROR(ORPSIM-15007): Model myjfet has negative PB.&lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current 200 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB -2.389E-03 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;br /&gt;&lt;code&gt; myjfet (T_Current 27 T_Measured 25)&lt;/code&gt;&lt;br /&gt;&lt;code&gt; PB 9.982E-01 &lt;/code&gt;&lt;br /&gt;&lt;code&gt;...&lt;/code&gt;&lt;/p&gt;
&lt;/blockquote&gt;
&lt;p&gt;When using .step instead of the nested sweep, it works normally. It also works normally using nested sweep, when sweeping a source and not a param.&lt;/p&gt;
&lt;p&gt;Tested on version PSpice 25.1.0, PSpice 24.1.0 and PSpice 17.4.0&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Matej&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Your access to On-Demand Webinar : From Wall to Rail – Turning Rules of Thumb into Proof</title><link>https://community.cadence.com/thread/66213?ContentTypeID=0</link><pubDate>Wed, 29 Jul 2026 05:50:12 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:1f7c7459-c6f6-467c-bcb9-19dfcd7f8087</guid><dc:creator>Renu Vibha</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/66213?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/66213/your-access-to-on-demand-webinar-from-wall-to-rail-turning-rules-of-thumb-into-proof/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;&lt;span&gt;Rules of thumb don&amp;#39;t pass safety reviews; proof does.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;This webinar demonstrates constraint-driven flyback design in Cadence&amp;rsquo;s Allegro X Design Platform and PSpice.&lt;/p&gt;
&lt;p&gt;See how to verify hot-loop geometry, isolation spacing, and startup behavior before you build hardware.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;For more details , check&amp;nbsp;&lt;a href="https://www.cadence.com/en_US/home/resources/on-demand-webinars/turning-rules-of-thumb-into-proof.html?utm_campaign=cpgmkting_allegro_webinars_ww&amp;amp;utm_medium=cta&amp;amp;utm_source=forum"&gt;From Wall to Rail &amp;ndash; Turning Rules of Thumb into Proof | Cadence&lt;/a&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Modeling Schottky Diodes in PSpice – Understanding IS and N Parameters</title><link>https://community.cadence.com/thread/66209?ContentTypeID=0</link><pubDate>Tue, 28 Jul 2026 09:32:41 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:130fd8fd-ad13-471e-873a-f63a25816d73</guid><dc:creator>IshaS</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/66209?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/66209/modeling-schottky-diodes-in-pspice-understanding-is-and-n-parameters/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;&lt;strong&gt;&lt;/strong&gt;Schottky diodes are indispensable part of modern hardware design. Their low forward voltage drop (typically 0.2&amp;ndash;0.45 V versus 0.6&amp;ndash;0.7 V for a standard PN junction) and near-zero reverse recovery time make them go-to choice in high-frequency switching power supplies, RF signal detection, OR-ing circuits, and flyback clamp networks. Wherever efficiency, speed, or tight voltage headroom matters, a Schottky is usually in the signal path.&lt;/p&gt;
&lt;p&gt;But selecting the right device is only half the job. Simulating it accurately is the other half and that&amp;#39;s where most designs quietly go wrong.&lt;/p&gt;
&lt;p&gt;In PSpice, a Schottky diode&amp;#39;s behavior is governed primarily by two model parameters: &lt;strong&gt;IS&lt;/strong&gt; &lt;strong&gt;(reverse saturation current)&lt;/strong&gt; and &lt;strong&gt;N (ideality factor).&lt;/strong&gt; These two values define the entire shape of the I-V curve. Get them right, and your simulation predicts forward voltage drop, power dissipation, and switching behavior with confidence. Get them wrong - which happens whenever you use an unverified default model - and every downstream calculation built on that simulation is off including thermal margins, efficiency estimates and gate drive timing.&lt;/p&gt;
&lt;p&gt;This post walks through how to tune IS and N in PSpice using nested DC sweeps, so your simulation matches the datasheet and holds up on the bench.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;The diode current is governed by the equation:&lt;br /&gt; &lt;strong&gt;I = IS (e^(V / (N&amp;middot;Vt)) &amp;minus; 1)&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/110/pastedimage1785230525869v1.png" alt=" " /&gt;&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;This indicates that both IS and N play an important role in determining the forward voltage characteristics.&lt;/p&gt;
&lt;p&gt;IS (Reverse Saturation Current): Determines where along the voltage axis the I-V curve sits. In Schottky models, IS is typically several orders of magnitude larger than in standard PN junctions &amp;mdash; often in the &amp;mu;A to mA range &amp;mdash; which is the physical reason Schottky diodes conduct at a lower forward voltage. A lower IS shifts the curve to the right, increasing Vf for a given forward current. A higher IS shifts it left, reducing Vf.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;N (Ideality Factor): Controls the steepness of the exponential rise. An ideal diode has N = 1; real Schottky devices typically fall between 1.0 and 2.2 depending on the junction technology and operating region. A higher N flattens the curve &amp;mdash; you need more voltage to drive the same current &amp;mdash; and also makes the forward voltage more sensitive to temperature variation.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Together, IS sets the operating point and N shapes the curve around it. Both need to be calibrated to the actual device for the simulation to be trustworthy.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Simulation Steps:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Perform a &lt;strong&gt;DC sweep analysis&lt;/strong&gt; on a forward-biased circuit.&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/110/pastedimage1785230541658v2.png" alt=" " /&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Use &lt;strong&gt;Parametric sweeps&lt;/strong&gt; to vary IS and N independently.&lt;/li&gt;
&lt;li&gt;Example ranges:&lt;ul&gt;
&lt;li&gt;IS: 3e-04 to 3e-08&lt;/li&gt;
&lt;li&gt;N: 2.2 to 3&lt;/li&gt;
&lt;/ul&gt;
&lt;/li&gt;
&lt;li&gt;Observe resulting changes in forward voltage and current characteristics.&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/110/pastedimage1785230558755v3.png" alt=" " /&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;strong&gt;Effect of IS (Reverse Saturation Current):&lt;/strong&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;ul&gt;
&lt;li&gt;&lt;ul&gt;
&lt;li&gt;Forward voltage drop can be tuned by modifying IS.&lt;/li&gt;
&lt;li&gt;A &lt;strong&gt;lower IS results in a higher forward voltage&lt;/strong&gt; for the same current.&lt;/li&gt;
&lt;/ul&gt;
&lt;/li&gt;&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/110/pastedimage1785230568619v4.png" alt=" " /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/110/pastedimage1785230577095v5.png" alt=" " /&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;strong&gt;Effect of N (Ideality Factor):&lt;/strong&gt;&lt;ul&gt;
&lt;li&gt;Controls the slope of the I-V curve.&lt;/li&gt;
&lt;li&gt;Changing N modifies exponential behavior and deviation from ideal characteristics.&lt;/li&gt;
&lt;/ul&gt;
&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/110/pastedimage1785230586454v6.png" alt=" " /&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/110/pastedimage1785230594050v7.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;This approach helps in accurately matching the diode model to real device behavior and achieving reliable simulation results.&lt;/p&gt;
&lt;p&gt;Have you run into a Schottky (or any diode) model that just&amp;nbsp;wouldn&amp;rsquo;t&amp;nbsp;match the datasheet or your bench data?&lt;br /&gt; Drop your experience in the comments &amp;ndash; what device, what mismatch, and how you&amp;nbsp;resolved&amp;nbsp;it.&lt;br /&gt;&lt;br /&gt;&lt;/p&gt;
&lt;p&gt;Happy Learning!!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Associate psice model greyed out</title><link>https://community.cadence.com/thread/66186?ContentTypeID=0</link><pubDate>Tue, 21 Jul 2026 16:35:43 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:5142a190-56e0-4697-b41b-ec75f5793106</guid><dc:creator>Shashank</dc:creator><slash:comments>3</slash:comments><comments>https://community.cadence.com/thread/66186?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/66186/associate-psice-model-greyed-out/rss?ContentTypeId=0</wfw:commentRss><description>&lt;ul&gt;
&lt;li class="v9V1QG_Item" data-w-component="list-item"&gt;
&lt;div class="ac5DTa_Box v9V1QG_Content" data-w-direction="col" data-w-auto-spacing="" data-w-list-content=""&gt;
&lt;p class="zlAe0W_TextBase zlAe0W_Text PDq2pG_selectionAnchorContainer" data-w-component="text" data-w-wrap="normal"&gt;OrCAD X Capture 24.1.&lt;span class="PDq2pG_selectionAnchor"&gt;&lt;/span&gt;&lt;/p&gt;
&lt;/div&gt;
&lt;/li&gt;
&lt;li class="v9V1QG_Item" data-w-component="list-item"&gt;
&lt;div class="ac5DTa_Box v9V1QG_Content" data-w-direction="col" data-w-auto-spacing="" data-w-list-content=""&gt;
&lt;p class="zlAe0W_TextBase zlAe0W_Text" data-w-component="text" data-w-wrap="normal"&gt;&lt;strong&gt;Created Project A without selecting &lt;span class="zlAe0W_TextBase zlAe0W_Text rFU14q_Emphasis" data-w-component="bold" data-w-default-strong="" data-w-inline="" data-w-wrap="normal"&gt;Enable PSpice Simulation&lt;/span&gt;.&lt;/strong&gt;&lt;/p&gt;
&lt;/div&gt;
&lt;/li&gt;
&lt;li class="v9V1QG_Item" data-w-component="list-item"&gt;
&lt;div class="ac5DTa_Box v9V1QG_Content" data-w-direction="col" data-w-auto-spacing="" data-w-list-content=""&gt;
&lt;p class="zlAe0W_TextBase zlAe0W_Text" data-w-component="text" data-w-wrap="normal"&gt;&lt;strong&gt;Created Project B with &lt;span class="zlAe0W_TextBase zlAe0W_Text rFU14q_Emphasis" data-w-component="bold" data-w-default-strong="" data-w-inline="" data-w-wrap="normal"&gt;Enable PSpice Simulation&lt;/span&gt; selected.&lt;/strong&gt;&lt;/p&gt;
&lt;/div&gt;
&lt;/li&gt;
&lt;li class="v9V1QG_Item" data-w-component="list-item"&gt;
&lt;div class="ac5DTa_Box v9V1QG_Content" data-w-direction="col" data-w-auto-spacing="" data-w-list-content=""&gt;
&lt;p class="zlAe0W_TextBase zlAe0W_Text" data-w-component="text" data-w-wrap="normal"&gt;Placed the same SamacSys Library Loader component in both projects.&lt;/p&gt;
&lt;/div&gt;
&lt;/li&gt;
&lt;li class="v9V1QG_Item" data-w-component="list-item"&gt;
&lt;div class="ac5DTa_Box v9V1QG_Content" data-w-direction="col" data-w-auto-spacing="" data-w-list-content=""&gt;
&lt;p class="zlAe0W_TextBase zlAe0W_Text" data-w-component="text" data-w-wrap="normal"&gt;In Project A, &lt;span class="zlAe0W_TextBase zlAe0W_Text rFU14q_Emphasis" data-w-component="bold" data-w-default-strong="" data-w-inline="" data-w-wrap="normal"&gt;Associate PSpice Model&lt;/span&gt; is&lt;strong&gt; grayed out.&lt;/strong&gt;&lt;/p&gt;
&lt;/div&gt;
&lt;/li&gt;
&lt;li class="v9V1QG_Item" data-w-component="list-item"&gt;
&lt;div class="ac5DTa_Box v9V1QG_Content" data-w-direction="col" data-w-auto-spacing="" data-w-list-content=""&gt;
&lt;p class="zlAe0W_TextBase zlAe0W_Text" data-w-component="text" data-w-wrap="normal"&gt;In Project B, &lt;span class="zlAe0W_TextBase zlAe0W_Text rFU14q_Emphasis" data-w-component="bold" data-w-default-strong="" data-w-inline="" data-w-wrap="normal"&gt;Associate PSpice Model&lt;/span&gt; is &lt;strong&gt;enabled.&lt;/strong&gt;&lt;/p&gt;
&lt;/div&gt;
&lt;div class="ac5DTa_Box v9V1QG_Content" data-w-direction="col" data-w-auto-spacing="" data-w-list-content=""&gt;
&lt;p class="zlAe0W_TextBase zlAe0W_Text" data-w-component="text" data-w-wrap="normal"&gt;&lt;/p&gt;
&lt;/div&gt;
&lt;/li&gt;
&lt;li class="v9V1QG_Item" data-w-component="list-item"&gt;
&lt;div class="ac5DTa_Box v9V1QG_Content" data-w-direction="col" data-w-auto-spacing="" data-w-list-content=""&gt;
&lt;p class="zlAe0W_TextBase zlAe0W_Text" data-w-component="text" data-w-wrap="normal"&gt;Since Simulation Profile can still be created in both Projects , I am unsure why only &lt;span class="zlAe0W_TextBase zlAe0W_Text rFU14q_Emphasis" data-w-component="bold" data-w-default-strong="" data-w-inline="" data-w-wrap="normal"&gt;Associate PSpice Model&lt;/span&gt; is disabled.&lt;/p&gt;
&lt;/div&gt;
&lt;/li&gt;
&lt;li class="v9V1QG_Item" data-w-component="list-item"&gt;
&lt;div class="ac5DTa_Box v9V1QG_Content" data-w-direction="col" data-w-auto-spacing="" data-w-list-content=""&gt;
&lt;p class="zlAe0W_TextBase zlAe0W_Text" data-w-component="text" data-w-wrap="normal"&gt;&lt;strong&gt;Is this expected behavior in OrCAD X Capture 24.1?&lt;/strong&gt;&lt;/p&gt;
&lt;/div&gt;
&lt;/li&gt;
&lt;li class="v9V1QG_Item" data-w-component="list-item"&gt;
&lt;div class="ac5DTa_Box v9V1QG_Content" data-w-direction="col" data-w-auto-spacing="" data-w-list-content=""&gt;
&lt;p class="zlAe0W_TextBase zlAe0W_Text" data-w-component="text" data-w-wrap="normal"&gt;&lt;strong&gt;Is there a supported way to enable &lt;span class="zlAe0W_TextBase zlAe0W_Text rFU14q_Emphasis" data-w-component="bold" data-w-default-strong="" data-w-inline="" data-w-wrap="normal"&gt;Associate PSpice Model&lt;/span&gt; in an existing project created without &lt;span class="zlAe0W_TextBase zlAe0W_Text rFU14q_Emphasis" data-w-component="bold" data-w-default-strong="" data-w-inline="" data-w-wrap="normal"&gt;Enable PSpice Simulation&lt;/span&gt;, or is creating a new PSpice-enabled project required?&lt;/strong&gt;&lt;/p&gt;
&lt;/div&gt;
&lt;/li&gt;
&lt;li class="v9V1QG_Item" data-w-component="list-item"&gt;
&lt;div class="ac5DTa_Box v9V1QG_Content" data-w-direction="col" data-w-auto-spacing="" data-w-list-content=""&gt;
&lt;p class="zlAe0W_TextBase zlAe0W_Text" data-w-component="text" data-w-wrap="normal"&gt;&lt;strong&gt;Is there any project setting that controls the availability of &lt;span class="zlAe0W_TextBase zlAe0W_Text rFU14q_Emphasis" data-w-component="bold" data-w-default-strong="" data-w-inline="" data-w-wrap="normal"&gt;Associate PSpice Model&lt;/span&gt;?&lt;/strong&gt;&lt;/p&gt;
&lt;/div&gt;
&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>PSpice Special Components: Print1, Print2 and PRINTDGTLCHG</title><link>https://community.cadence.com/thread/66143?ContentTypeID=0</link><pubDate>Tue, 07 Jul 2026 16:41:44 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:71f1548e-c199-449d-8eef-f920ff73cda1</guid><dc:creator>AyushD</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/66143?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/66143/pspice-special-components-print1-print2-and-printdgtlchg/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;&lt;strong&gt;Print1:&lt;br /&gt;&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;Use this component to insert&lt;span&gt;&amp;nbsp;&lt;/span&gt;&lt;code&gt;.PRINT&lt;/code&gt;&lt;span&gt;&amp;nbsp;&lt;/span&gt;command in your simulation. This component enables you to print voltage at node in simulation output (&lt;code&gt;.out&lt;/code&gt;) file.&lt;/p&gt;
&lt;p&gt;You need to configure one or more parameters on this symbol instances from following list to use in simulation flow.&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Analysis Type: Assign any value to one of the variables&lt;span&gt;&amp;nbsp;&lt;/span&gt;&lt;code&gt;AC&lt;/code&gt;/&lt;code&gt;DC&lt;/code&gt;/&lt;code&gt;TRAN&lt;/code&gt;, depending upon the analysis you are performing. For example if your simulation profile is configured for Transient Analysis you should set&lt;span&gt;&amp;nbsp;&lt;/span&gt;&lt;code&gt;TRAN&lt;/code&gt;&lt;span&gt;&amp;nbsp;&lt;/span&gt;property value as 1.&lt;/li&gt;
&lt;li&gt;Functions: You can use following special function on output nodes
&lt;ul&gt;
&lt;li&gt;&lt;code&gt;DB&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;&lt;code&gt;PHASE&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;&lt;code&gt;REAL&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;&lt;code&gt;MAG&lt;/code&gt;&lt;/li&gt;
&lt;li&gt;&lt;code&gt;IMAG&lt;/code&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;br /&gt;You can use one or more of the parameters at a time. To select these you need to assign any value to these parameter, say,&lt;span&gt;&amp;nbsp;&lt;/span&gt;&lt;code&gt;1&lt;/code&gt;. For example, if you have set&lt;span&gt;&amp;nbsp;&lt;/span&gt;&lt;code&gt;DB&lt;/code&gt;&lt;span&gt;&amp;nbsp;&lt;/span&gt;and&lt;span&gt;&amp;nbsp;&lt;/span&gt;&lt;code&gt;PHASE&lt;/code&gt;&lt;span&gt;&amp;nbsp;&lt;/span&gt;values to 1 on symbol instance and this component is connected to node&lt;span&gt;&amp;nbsp;&lt;/span&gt;&lt;code&gt;VOUT&lt;/code&gt;, it will print following in output file:&lt;br /&gt;&lt;code&gt;DB of Voltage at VOUT node&lt;/code&gt;&lt;br /&gt;&lt;code&gt;PHASE of Voltage at VOUT node&lt;/code&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;strong&gt;&amp;nbsp;&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Print2:&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;PRINT2 performs the same function as PRINT1, only difference being this component should be used for differential voltage between two nodes.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;PRINTDGTLCHG:&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;Use this component for digital nodes. It lists every change of state for a given node in the output file. You need not specify any parameter on this symbol instance.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;h2 id="SpecialComponents-98791PRINTDGTLCHG"&gt;&lt;/h2&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>使用 PSpice-for-TI时，显示这个芯片没有在已配置的库中找到，我尝试在Simulation Settings中配置，</title><link>https://community.cadence.com/thread/66071?ContentTypeID=0</link><pubDate>Mon, 15 Jun 2026 14:22:10 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:31665ae3-e841-438b-9dd4-d66f9b67e58b</guid><dc:creator>WZ202606154651</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/66071?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/66071/pspice-for-ti-simulation-settings/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;&lt;span&gt;使用 PSpice-for-TI时，我在我自己创建的例程中使用LMR33630ADDA_TRANS等芯片时，会出现一个警告，显示这个芯片没有在已配置的库中找到，我尝试在Simulation Settings中配置，并没有什么用，并且仿真结果异常&lt;/span&gt;&lt;span&gt;&lt;span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Exporting PSPICE netlist with Subckt parameters</title><link>https://community.cadence.com/thread/66043?ContentTypeID=0</link><pubDate>Wed, 03 Jun 2026 20:44:16 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:da0c4f7d-df11-439b-bfd0-381a4a309f62</guid><dc:creator>SC202412036016</dc:creator><slash:comments>4</slash:comments><comments>https://community.cadence.com/thread/66043?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/66043/exporting-pspice-netlist-with-subckt-parameters/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;I am trying to export a PSPICE netlist of a simple subcircuit where I have to pass in parameters, however parameter definition is happening after ENDS, instead of the top line where the subcircuit is being defined. There is a .PARAMS in the subckt line however the actual parameter (lval) is showing up right at the end. Any ideas on where the issues may be?&lt;/p&gt;
&lt;p&gt;I cannot seem to attach a screenshot of the template settings, but if this works for anyone would be great if you can send a screenshot of the template settings where the ParamList is displayed at the top.&lt;/p&gt;
&lt;p&gt;1. To extract the netlist I go to Tools &amp;gt; Create Netlist&lt;/p&gt;
&lt;p&gt;2. Here is the output:&amp;nbsp;&lt;/p&gt;
&lt;p&gt;* source BLOCK_AOL&lt;br /&gt;.SUBCKT Aol_Block InN InP OutN OutP PARAMS : &lt;br /&gt;G_G1 OUTP OUTN INP INN -1u&lt;br /&gt;L_L1 N00976 OUTN {LVAL} TC=0,0 &lt;br /&gt;R_R2 N00976 OUTP 1M TC=0,0 &lt;br /&gt;.ENDS Aol_Block&lt;br /&gt;.PARAM lval=1n&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Persistent netlisting error</title><link>https://community.cadence.com/thread/66023?ContentTypeID=0</link><pubDate>Mon, 01 Jun 2026 12:07:33 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:9ebdcf5b-d725-4fbc-96f4-680f699d1bd0</guid><dc:creator>AG202606016357</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/66023?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/66023/persistent-netlisting-error/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;I&amp;#39;m using &amp;quot;PSpice for TI&amp;quot; to simulate a DCDC converter implementing a specific TI PWM controller (hence the selection of the simulation tool).&lt;/p&gt;
&lt;p&gt;My schematic is drawn and seems correct. Still, when I launch the netlist generation, I get the following error message:&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&amp;quot;ERROR(ORCAP-15065): There are netlisting errors.&lt;/p&gt;
&lt;p&gt;Check the session log.&amp;quot;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;In the session log, I find:&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&amp;quot;INFO(ORNET-1041): Writing PSpice Flat Netlist \\xxx\yyy\SCHEMATIC1\SCHEMATIC1.net&lt;br /&gt;INFO(ORNET-1169): Unable to open the property mapping file: devparam.txt. To resolve this problem, ensure that PSpice.ini exists at the correct location. After that check Library Path in simulation settings contains &amp;lt;installation-path&amp;gt;/tools/pspice/library path and then create the netlist again.&lt;br /&gt;INFO(ORNET-1162): Unable to create design property file&amp;quot;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;I completed the proposed checks and everything is OK.&lt;/p&gt;
&lt;p&gt;I gave a try with a very simple schematic (1 DC source, 1 ideal R and 1 ideal C). I got the exact same error.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;How can I solve this error?&lt;/p&gt;
&lt;p&gt;What should I do?&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Thanks for helping me.&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>PSpice Special Component: Watch1</title><link>https://community.cadence.com/thread/66018?ContentTypeID=0</link><pubDate>Sun, 31 May 2026 19:15:05 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:6e5e6cbd-03ce-4c24-b6f3-c311b62bb7ee</guid><dc:creator>AyushD</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/66018?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/66018/pspice-special-component-watch1/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;.WATCH command&amp;nbsp;enables user&amp;nbsp;to observe voltage at node in simulation status windows while simulation is in progress.&lt;/p&gt;
&lt;p&gt;Attach this part (WATCH1) at node or net which you will like to observe during the simulation. After this, you need to define following three parameters on symbol instance:&lt;br /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Analysis:&lt;/strong&gt; Assign the one of the following three values depending upon the type of analysis being performed:&lt;br /&gt;&amp;nbsp; &amp;nbsp;DC&lt;br /&gt;&amp;nbsp; &amp;nbsp;AC&lt;br /&gt;&amp;nbsp; &amp;nbsp;TRAN&lt;br /&gt;&lt;br /&gt;&lt;strong&gt;HI:&lt;/strong&gt; Assign a numeric value to define upper limit of voltage&lt;br /&gt;&lt;strong&gt;LO:&lt;/strong&gt; Assign a numeric value to define lower limit of voltage&lt;br /&gt;&lt;br /&gt;Simulator pauses if voltage at node is outside of range defined by HI and LO.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Unable to Upload Images</title><link>https://community.cadence.com/thread/65987?ContentTypeID=0</link><pubDate>Mon, 04 May 2026 16:26:34 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:ad134f72-e1c3-4879-a10b-27ff4f59ac6e</guid><dc:creator>MrTF</dc:creator><slash:comments>3</slash:comments><comments>https://community.cadence.com/thread/65987?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/65987/unable-to-upload-images/rss?ContentTypeId=0</wfw:commentRss><description>&lt;div&gt;
&lt;p&gt;Dear all,&lt;/p&gt;
&lt;p&gt;I have tried several times to upload an image from my simulation in order to post a question.&lt;/p&gt;
&lt;p&gt;Unfortunately, this has not been possible so far. Each time, I receive a message advising me to contact the administrator.&lt;/p&gt;
&lt;p&gt;Could you please let me know how to proceed or whom I should contact to resolve this issue?&lt;/p&gt;
&lt;p&gt;Thank you in advance for your support.&lt;/p&gt;
&lt;/div&gt;
&lt;p&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Model stepping in PSpice</title><link>https://community.cadence.com/thread/65974?ContentTypeID=0</link><pubDate>Thu, 30 Apr 2026 16:38:48 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:ef6a8434-52ad-47e6-99cf-fca5a77caf59</guid><dc:creator>IshaS</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/65974?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/65974/model-stepping-in-pspice/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Starting with &lt;strong&gt;SPB 25.1&lt;/strong&gt;, PSpice introduces &lt;strong&gt;model stepping&lt;/strong&gt;, which allows multiple models of the same component to be simulated in a single run and compared directly in the Probe window. All results are stored in one data file, making side‑by‑side analysis simple and efficient.&lt;/p&gt;
&lt;p&gt;This is done using the. modelstep directive. For example, as shown in the following image, for the given circuit, a&amp;nbsp;.modelstep&amp;nbsp;statement has been defined as:&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;@PSpice:&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;.modelstep STPSC10065D MUR1560&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;Now, tool will simulate the design with both the PSpice models for D1 as defined in the above statement (STPSC10065D and MUR1560).&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/110/pastedimage1777567099543v1.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;When the simulation is run, PSpice automatically steps through both models and displays their results together in the Probe window. This makes it easy to compare waveforms and performance and select the most suitable device. The Probe output also shows the total job time for all stepped models.&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:480px;max-width:640px;" src="https://community.cadence.com/resized-image/__size/1280x960/__key/communityserver-discussions-components-files/110/pastedimage1777567114066v2.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;Try this and share your insights!&lt;/p&gt;
&lt;p&gt;&lt;br /&gt; Happy Learning !!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Efficient Method to Perform Temperature Sensitivity Analysis and Rank Dominant Components in PSpice</title><link>https://community.cadence.com/thread/65973?ContentTypeID=0</link><pubDate>Thu, 30 Apr 2026 15:43:57 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:7a1fad12-2cbe-495b-81fd-c23653c359b5</guid><dc:creator>MrTF</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/65973?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/65973/efficient-method-to-perform-temperature-sensitivity-analysis-and-rank-dominant-components-in-pspice/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p data-start="151" data-end="361"&gt;I am working on a precision analog circuit and I want to assess &lt;strong data-start="215" data-end="242"&gt;temperature sensitivity&lt;/strong&gt; and identify which components dominate performance variation due to temperature in an &lt;strong data-start="329" data-end="360"&gt;efficient and automated way.&lt;/strong&gt;&lt;/p&gt;
&lt;p data-start="363" data-end="445"&gt;My objective is not simply to observe output variation of a specific performance metric versus temperature, but to:&lt;/p&gt;
&lt;ul data-start="447" data-end="764"&gt;
&lt;li data-start="447" data-end="571"&gt;Quantify the sensitivity of a performance metric (e.g., output current, impedance, or noise) with respect to temperature&lt;/li&gt;
&lt;li data-start="572" data-end="671"&gt;Attribute this variation to individual components (R, L, C, coupling factors, parasitics, etc.)&lt;/li&gt;
&lt;li data-start="672" data-end="764"&gt;Rank components based on their contribution to the overall temperature-induced variation&lt;/li&gt;
&lt;/ul&gt;
&lt;p data-start="766" data-end="1105"&gt;One approach I considered is to encode temperature effects as equivalent tolerances (i.e., mapping TC-induced drift into % variation) and then perform a standard sensitivity or worst-case analysis. However, this would require maintaining two versions of the circuit (nominal vs &amp;ldquo;temperature-perturbed&amp;rdquo;), which is not practical or scalable.&lt;/p&gt;
&lt;p data-start="1107" data-end="1323"&gt;To clarify, I am &lt;strong data-start="1124" data-end="1178"&gt;not referring to a simple global temperature sweep&lt;/strong&gt; or single-parameter variation. I am looking for a method that enables &lt;strong data-start="1249" data-end="1322"&gt;systematic decomposition of temperature effects across all components&lt;/strong&gt;.&lt;/p&gt;
&lt;p data-start="1325" data-end="1392"&gt;&amp;nbsp;Is there a rigorous and efficient workflow in PSpice/Cadence to:&lt;/p&gt;
&lt;ul data-start="1393" data-end="1570"&gt;
&lt;li data-start="1393" data-end="1509"&gt;perform sensitivity analysis with respect to temperature and&lt;/li&gt;
&lt;li data-start="1510" data-end="1570"&gt;automatically identify and rank the dominant contributors?&lt;/li&gt;
&lt;/ul&gt;
&lt;p data-start="1572" data-end="1713"&gt;Any guidance on built-in features I may miss would be highly appreciated.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>OP467 Component - Simulation Model Issue</title><link>https://community.cadence.com/thread/65919?ContentTypeID=0</link><pubDate>Tue, 14 Apr 2026 11:07:43 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:dc6c7e76-ec91-412e-8d78-38de4ceae446</guid><dc:creator>MrTF</dc:creator><slash:comments>2</slash:comments><comments>https://community.cadence.com/thread/65919?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/65919/op467-component---simulation-model-issue/rss?ContentTypeId=0</wfw:commentRss><description>&lt;div&gt;
&lt;p&gt;Dear all,&lt;/p&gt;
&lt;p&gt;I am using the &lt;strong&gt;OP467&lt;/strong&gt; model, which I selected via (Menu)&lt;br /&gt; &lt;strong&gt;Place &amp;rarr; Component &amp;rarr; PSpice Category Model&lt;/strong&gt;.&lt;/p&gt;
&lt;p&gt;During simulation, I receive the following warning:&lt;/p&gt;
&lt;blockquote&gt;
&lt;p&gt;&lt;strong&gt;DRC Type:&lt;/strong&gt; Electrical&lt;br /&gt; &lt;strong&gt;Warning (ORCAP‑2445)&lt;/strong&gt;&lt;br /&gt; Instance &lt;strong&gt;UxD&lt;/strong&gt;, &lt;strong&gt;SCHEMATIC1&lt;/strong&gt;, &lt;strong&gt;PAGE 1&lt;/strong&gt; (XXX.xx, XXX.xx),&lt;br /&gt; not found in the configured libraries.&lt;/p&gt;
&lt;/blockquote&gt;
&lt;p&gt;Could someone please clarify:&lt;/p&gt;
&lt;ol&gt;
&lt;li&gt;What exactly does this warning refer to?&lt;/li&gt;
&lt;li&gt;Does it imply any potential malfunction or inaccuracy in the simulation results?&lt;/li&gt;
&lt;li&gt;Why is the component reported as &amp;ldquo;not found in the configured libraries,&amp;rdquo; even though it appears to be located under the &lt;strong&gt;CIS Unified Library&lt;/strong&gt;?&lt;/li&gt;
&lt;li&gt;In the model I use there is a parameter with the description &amp;quot;LEVEL 3&amp;quot;. To what this parameter refers to?&lt;/li&gt;
&lt;/ol&gt;
&lt;p&gt;Any guidance would be greatly appreciated.&lt;/p&gt;
&lt;p&gt;Thank you in advance.&lt;/p&gt;
&lt;/div&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Ground connection in simulating three phase PFC</title><link>https://community.cadence.com/thread/65896?ContentTypeID=0</link><pubDate>Fri, 03 Apr 2026 09:50:19 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:bbb77d77-0c4c-4420-90c9-61cf43cd2baf</guid><dc:creator>GM202604016252</dc:creator><slash:comments>1</slash:comments><comments>https://community.cadence.com/thread/65896?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/65896/ground-connection-in-simulating-three-phase-pfc/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;&lt;img style="max-height:317px;max-width:702px;" alt=" " height="317" src="https://community.cadence.com/resized-image/__size/1404x634/__key/communityserver-discussions-components-files/110/Screenshot-2026_2D00_04_2D00_01-1815041.png" width="702" /&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;div&gt;
&lt;p&gt;&lt;/p&gt;
&lt;div&gt;
&lt;p&gt;Hi everyone,&lt;/p&gt;
&lt;p&gt;I&amp;rsquo;m simulating a three‑phase PFC in ORCAD PSPice. The real circuit also includes an input LC filter, which I&amp;rsquo;ve omitted here for simplicity, but the behavior I&amp;rsquo;m seeing is always the same. In my current setup, the Pspice ground reference is connected to the negative node of the rectifier bridge, while the three AC sources have their star point left floating. During simulation, I observe that it is the star point of the generators that &amp;ldquo;moves&amp;rdquo; with respect to ground, while the negative node of the bridge remains fixed because it is tied to the reference. Which is of course normal for my simulation.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;I&amp;rsquo;m wondering whether this behavior is correct. Can this simply be considered a consequence of how the simulator assigns the ground reference, or am I introducing a significant error compared to the real‑world behavior of the circuit? In other words, is it acceptable that the generators&amp;rsquo; star point moves while the rectifier negative stays fixed, or could this lead to unrealistic results?&lt;/p&gt;
&lt;p&gt;Another thing I don&amp;rsquo;t fully understand: if I try the opposite approach&amp;mdash;connecting the ground to the star point of the generator and leaving the bridge negative floating (using a very large resistor like 5 M&amp;Omega; instead of the direct connection)&amp;mdash;the simulation immediately diverges, leaving me with no results. Is there a way to stabilize the simulation in this configuration, or is it inherently problematic?&lt;/p&gt;
&lt;p&gt;My main question is: how can I simulate a circuit in which&amp;nbsp;I connect&amp;nbsp;the ground to the star point of the generator and leave the bridge negative floating?&amp;nbsp;&lt;/p&gt;
&lt;p&gt;My &lt;strong&gt;simulation profile&lt;/strong&gt; is: time transient form 0 to 180ms, starting to save data from 160ms. this time to allow the PFC to stabilyze.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Thanks in advance to anyone who can help clarify this.&lt;/p&gt;
&lt;/div&gt;
&lt;br /&gt;
&lt;p&gt;&lt;/p&gt;
&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Using SMSTP(x, r) for Smoother and Faster Simulations in Allegro PSpice</title><link>https://community.cadence.com/thread/65866?ContentTypeID=0</link><pubDate>Tue, 24 Mar 2026 11:41:07 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:72945fe5-e60f-4b87-bb9e-c3809a253764</guid><dc:creator>IshaS</dc:creator><slash:comments>0</slash:comments><comments>https://community.cadence.com/thread/65866?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/65866/using-smstp-x-r-for-smoother-and-faster-simulations-in-allegro-pspice/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;Hello everyone,&lt;/p&gt;
&lt;p&gt;If you&amp;#39;re using traditional step functions (like &lt;em&gt;STP&lt;/em&gt; or Heaviside) in PSpice, you&amp;rsquo;ve probably seen issues such as sharp discontinuities, tiny timesteps, slow simulations, and convergence problems.&lt;/p&gt;
&lt;p&gt;To overcome these limitations, Allegro PSpice introduces the&amp;nbsp;SMSTP(x, r)&amp;nbsp;function, which is defined as:&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;SMSTP(x,r)=0.5+0.5&lt;/strong&gt;&lt;strong&gt;&amp;sdot;tanh(r&lt;/strong&gt;&lt;strong&gt;&amp;sdot;x)&lt;/strong&gt;&lt;/p&gt;
&lt;p&gt;This gives a smooth transition from 0 &amp;rarr; 1, and the parameter &lt;strong&gt;r&lt;/strong&gt; lets you control the steepness.&lt;br /&gt; Higher &lt;strong&gt;r&lt;/strong&gt; = sharper but still smooth transition.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Advantages of SMSTP in Allegro PSpice:&lt;/strong&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Simulator-Friendly:&amp;nbsp;It reduces the need for tiny timesteps, thus speeding up simulations.&lt;/li&gt;
&lt;li&gt;Improved Convergence:&amp;nbsp;Smooth transitions help solvers reach solutions more reliably.&lt;/li&gt;
&lt;li&gt;Tunable Behavior:&amp;nbsp;The r&amp;nbsp;parameter&amp;nbsp;controls the steepness and domain of the transition, as shown below:&lt;ul&gt;
&lt;li&gt;r = 2 transition over domain &amp;gt; [-1, 1]&lt;/li&gt;
&lt;li&gt;r = 4 domain &amp;gt; [-0.5, 0.5]&lt;/li&gt;
&lt;li&gt;Higher&amp;nbsp;r&amp;nbsp;values &amp;gt; sharper transitions within narrower domains&lt;/li&gt;
&lt;/ul&gt;
&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Hope this helps anyone working on switching or behavioral models! If needed, I can share example plots or circuit snippets.&lt;/p&gt;
&lt;p&gt;Happy Learning!!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>How to add the .net file provided by EPC for simulation</title><link>https://community.cadence.com/thread/65823?ContentTypeID=0</link><pubDate>Tue, 10 Mar 2026 09:52:49 GMT</pubDate><guid isPermaLink="false">75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:0c33cedd-6219-4a65-b1e6-1d963c83d52f</guid><dc:creator>KW202603107421</dc:creator><slash:comments>3</slash:comments><comments>https://community.cadence.com/thread/65823?ContentTypeID=0</comments><wfw:commentRss>https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/65823/how-to-add-the-net-file-provided-by-epc-for-simulation/rss?ContentTypeId=0</wfw:commentRss><description>&lt;p&gt;When simulating the LMG1210, I want to use real GaN switches in the simulation. However, for models like the EPC2204, the manufacturer only provides a .net file. After changing the file extension to .lib, capitalizing .subckt and .ends, and appending EPC2204A, the simulation model still cannot be read.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>