https://community.cadence.com/cadence_technology_forums/pcb-design/en-USTelligent Community 13https://community.cadence.com/cadence_technology_forums/pcb-design/f/design-entry-hdl/74713/part-developer-pdv-missing-in-spb-24-1-on-linux-how-to-create-de-hdl-library-partsFri, 16 Oct 2026 15:00:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:cf52732f-31ce-4acd-923c-ca9a96816fd6DT202608276859What is the supported workflow for creating complete DE-HDL parts in 24.1? Is there a replacement launcher or additional installation component? RHEL 8.10; SPB 24.1 S008. Existing shared, file-based DE-HDL libraries configured through cds.lib . syscap launches successfully with PCB_librarian_expert checked out. Library Explorer offers only Symbols ; Add opens Create New Schematic Model . pdv and pdv.exe exist in 17.4 and 22.1, but were not found in the 24.1 installation or its installed package file lists. Ask: What is the supported workflow for creating complete DE-HDL parts in 24.1? Is there a replacement launcher or additional installation component?https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/74712/performance-advisor-in-allegro-x-pcb-editor-identifying-and-resolving-database-performance-bottlenecksFri, 16 Oct 2026 11:29:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:15d22453-ce44-41e4-86a4-90ed26413a9evidhyaparameswariLarge and complex PCB designs can sometimes experience slower interactive operations, delayed DRC updates, or reduced editing responsiveness. To help diagnose and address these issues, Allegro X PCB Editor includes the Performance Advisor , a diagnostic utility integrated within the Database Check (DB Doctor) workflow. What is Performance Advisor? Performance Advisor is a specialized analysis tool that examines the PCB design database and identifies conditions that may contribute to degraded application performance. Instead of manually investigating potential causes, designers can use Performance Advisor to pinpoint database settings, constraint configurations, and design characteristics that may be impacting responsiveness. The tool provides actionable recommendations that help improve design efficiency and overall editing performance. Benefits of Using Performance Advisor By routinely running Performance Advisor, users can: Identify database-related performance issues before they become critical. Detect constraint configurations that may cause slow editing operations. Receive practical recommendations for improving design responsiveness. Optimize shape handling and database settings for large designs. Improve overall PCB layout productivity and user experience. How to Access Performance Advisor Performance Advisor is available through the Database Check (DB Doctor) utility in Allegro X PCB Editor. Navigation Path:Tools → Database Check Running Database Check launches the analysis process, where Performance Advisor evaluates the current design and presents any detected performance concerns along with recommended corrective actions.https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-scripting-tcl/59683/tcl-script-to-replace-selected-parts-with-a-component-from-library/1434952Fri, 16 Oct 2026 09:01:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:f40af384-46b5-48ba-a3b6-660c6133c226PatEscherCadAP can you provide information what the following variables are doing? bUpdate: int bNewVersion: int updateDPfromLib: int when we use RepalceInst ..... 1 1 1 1 1, then we ecounter an OrCAD crash when afterwards trying to do an LinkDatabasePart. so it seems that it is related to these booleans (I suspect it is bUdate or bNewVersion)https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-scripting-tcl/74699/trying-to-load-a-olb-librray-file/1434951Thu, 15 Oct 2026 14:08:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:84ddc1e3-ef7e-4a47-9397-c49b174d09a5digital1Hi TechnoBobby Sorry I didn't make myself clear i have already created a dsn project and i want to load the .opj file into the design under the project window unfortunately your answer loaded the .olb file into a differnt session than my original design. What I am doing is converting a kicad schematic into orcad this is so i can import Altium Binary mentor graphics binary cad star and a few others Im starting with the schematic and then i will be doing the pcb thsi will be useful as kicad can convert a gerber into a pcb file you then have to load the components. But i do appreciate the help thank youhttps://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-scripting-tcl/74699/trying-to-load-a-olb-librray-file/1434949Thu, 15 Oct 2026 05:14:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:184c6794-5843-4e41-8915-ef41e7e35b1cTechnoBobbyHi digital1 , After creating and saving the .olb, you can try loading it into the Project Manager using the same GUI Open method used for loading a DSN: Open {C:/path/to/test_library.olb} This should allow the library to be opened through the Capture GUI and shown in the Project Manager. Hope this helps.https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-scripting-skill/66183/how-to-merge-excel-cell-in-allgero-skill-using-axlspreadsheet-api/1434948Thu, 15 Oct 2026 02:25:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:08ab54e3-fa05-4998-ae4d-078944581b81HoangkhoipcbHi SK202607205032 Run the code in test.py without using a .exe file. import xlsxwriter workbook = xlsxwriter . Workbook ( "output.xlsx" ) worksheet = workbook . add_worksheet () worksheet . write ( "A1" , "Hello" ) worksheet . write ( "B1" , "World" ) worksheet . write ( "A2" , 100 ) workbook . close () type this code in cmd Allegro skill ipcBeginProcess ("python test.py" "" "CallbackFun" ); can remove CallbackFun BR, HoangKhoihttps://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-scripting-tcl/74699/trying-to-load-a-olb-librray-fileTue, 13 Oct 2026 12:35:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:5d296184-22e9-4d77-a3ac-cd72fa7f03d5digital1Hi All I have created this script to create a .olb library and save the library.unfortunately it doesnt load it into Project Manager under libraries # Get the active Capture Dbo session set lSession $::DboSession_s_pDboSession DboSession -this $lSession # Create a status object set lStatus [DboState] # Set the library name set lNewLibName [DboTclHelper_sMakeCString] DboTclHelper_sSetCString $lNewLibName "test_library.olb" # Create the library object set lNewLib [$lSession CreateLib $lNewLibName $lStatus] set lSaveStatus [$lSession SaveLib $lNewLib] #this now removed the library from the design and removed the lock on the library $lSession RemoveLib $lNewLib What i want is the code that will load this .olb library into project manager window in orcad capturehttps://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-system-capture/51937/syscap---tip-of-the-week-reordering-blocks/1434923Tue, 13 Oct 2026 11:37:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:4d0d7f3b-4393-43cf-b6d2-b9726a082f44JK202608104547I play here most evenings and want to share why this crypto casino suits me so well. What I enjoy as a player is that everything sits on one screen, so I never waste time switching around. This Pakistani platform loads fast and bonuses appear without any code hunting. Playing here is relaxing and I always stop once my budget is done. Simple and genuinely enjoyable.https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-scripting-skill/66183/how-to-merge-excel-cell-in-allgero-skill-using-axlspreadsheet-api/1434918Mon, 12 Oct 2026 07:02:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:ee7a44d8-ff5a-441a-9b34-1c3417c5cb94SK202607205032Hi HoangKhoi, I successfully import .json and exported the .xlsx file in Python. However, after converting the Python script into an .exe file and using it within the skill, the export failed(didn't find the .xlsx file). Is there any example?thanks a lot!https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-apd/74697/the-step-file-is-not-showing-the-correct-component-z-heightMon, 12 Oct 2026 03:17:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:2b5a6009-b5e0-4013-8340-805dffcbc468Gowtham PWhile exporting STEP files, the component Z-heights may not always match the package heights defined at the board level. This can occur when PACKAGE_HEIGHT_MAX is assigned to the place bound shape while the symbol definition continues to use its default package height. The step_board_level_package_height preference can be enabled under Setup > User Preferences > Interfaces > STEP to export the board-level place bound and height information to the STEP file. Note that enabling this option can increase the STEP file size. Have you encountered component height differences in your STEP exports? What approach do you use to maintain the correct 3D component heights?STEPinterfacesstep_board_level_package_heightheighthttps://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/66334/differential-pair-pad-entry/1434913Sun, 11 Oct 2026 05:51:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:a33f13de-172a-49ae-9752-9d6c36d09536excellon1There are many moving parts to the Diff- Pairs, One thing worth trying is the miter factor. If this is too low then your etch may not escape the pin and turn to sharply. So click on your pin to start your diff pair. In the "Options Pane" check to see if the actual miter is at a minimum 2xwidth. You can change that to a higher value to see how the diff-pair responds. If the Miter is set to something like 1xwidth the etch will turn too sharply and not escape the pins as you want. Its also possible to use single trace mode. In that mode you route off the pin a certain distance then left click to stop routing, next right click and uncheck single trace mode. The other pin should route in to match the etch you started. So click on pin both diff-pairs appear. Right click and choose "Single Trace mode" Rote off the pin and left click to stop routing. Right click and uncheck "Single Trace mode" Let us know if it works. More than likely the trouble is related to the miter. A good value for Pad Entry Factor is 75 !https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/70340/allegro-x-capture-will-not-launch-again-after-closing-the-application/1434911Fri, 09 Oct 2026 20:08:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:7a05369f-655e-4435-92b0-7f868cb34297gvelletI noted the same problem with Orcad capture 24.1 and also after updating to 25.1. It occurs mostly when both Orcad PCB and Capture were launched. Sometimes the processes close by themself but it takes time. Sometimes when I sync a layout from schematic, those tasks multply themselves, slowing down the PCB editor a lot. Sometimes the only cure is to reboot my workstations. I gave up trying to raise these kinds of issues to Cadence. But perhaps, if enough people vote for Zhifeng's message Cadence will try to help.https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/59002/exporting-libraries/1434903Thu, 08 Oct 2026 11:16:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:ca618231-0eab-408d-8672-ea3c2220678bDW202503105936I use 24.1 - On my database it was an issue with the text block sizes, I compacted them, and removed the ones which were over block 64, and the issue was resolved.https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/66334/differential-pair-pad-entry/1434902Thu, 08 Oct 2026 08:01:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:96ea07e5-1189-4b8b-b267-19689a8ec75esteveTry clicking on the Next button..... you can also type that into the Smart Search...https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/66334/differential-pair-pad-entry/1434900Wed, 07 Oct 2026 14:46:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:81e2e7b9-f692-423c-94e4-051c06f80da9YJ202407185547I don't see the padentry_factor on user preferencehttps://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-pcb-editor/66334/differential-pair-pad-entry/1434899Wed, 07 Oct 2026 13:48:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:b3968709-5f40-4999-888c-b1bac4ea474dsteveHave a look at Setup - User Preferences - Route - Connect and padentry_factor. This may help.https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/74691/cis-bill-of-materials-for-a-variant/1434898Wed, 07 Oct 2026 13:36:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:f5cf1d1c-f11f-4d30-8515-5c2096c8cd03TechnoBobbyHi VKravets , By default, CIS replaces the properties of Do Not Stuff (DNS) components with "Do Not Stuff" and sets the quantity to 0. To display the Part Number for DNS components in the BOM, run the following command in the Capture Command Window: SetOptionString CisBomDisplayPartNumberForDNS TRUE For more details, refer to following article on ASK portal: Title: How can I see the part number of parts that are not present in a variant in CIS BOM? URL: https://ask.cadence.com/ASK/article-viewer?id=a1Od0000000t3flEAA&pageName=article-viewer Hope this helps!https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-capture-cis/74688/why-are-some-component-properties-missing-in-the-cis-standard-bom-output/1434897Wed, 07 Oct 2026 13:28:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:3604b316-15ff-4397-839e-883fe48b192dTechnoBobbyHi LogicNet , One thing to check is whether the affected properties are configured with Transfer to Design in the CIS configuration. The CIS Standard BOM typically reports properties that have been transferred into the design. If a property is visible in CIS but is not marked for Transfer to Design, it may appear blank in the CIS BOM output. Try enabling Transfer to Design in Options > CIS Configuration > Setup for the affected properties, updating the components from the database, and generating the BOM again. Hope this helps!https://community.cadence.com/cadence_technology_forums/pcb-design/f/pspice/66336/error-orcommn-2302-cannot-initialize-profile/1434896Wed, 07 Oct 2026 13:22:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:e24c8801-5bd8-427f-b525-d428efa34a7eVolkerDHello Isha. Thanks for your answer. That process created a new registry folder " CaptureWorkspaceEx". Unfortunetaly ist didn' solve the problem. Still getting error "ERROR(ORCOMMN-2302): Cannot initialize profile." when I want to create a new Pspice simulation profile or open an old project with existing simulation profiles. Would appreciate other ideas. Best regards!https://community.cadence.com/cadence_technology_forums/pcb-design/f/allegro-x-system-capture/74692/efficiently-replace-components-nets-and-properties-in-allegro-x-system-captureWed, 07 Oct 2026 12:32:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:91c2b7cc-7ba1-4a6d-aaf8-0e2679a5f450Akshay khoslaDesign changes are a normal part of schematic development, whether driven by evolving requirements, component availability, or ECOs. Allegro X System Capture simplifies these updates with the Find and Replace feature ( Edit → Find and Replace ). By selecting Advanced , you can define the scope of changes as Entire Design , Block/Page , or Selection . With a few clicks, you can: Replace components throughout a project Rename net names globally Update properties in bulk This capability helps reduce manual effort, improves design consistency, and accelerates design updates across large projects. Have you used Find and Replace to streamline schematic changes? Share your experience with the community.