Sigrity - Recent Threads

RE: Why Cphy compliance demo simu IL result not pass? only 400mil length

JB202607048610 — Mon, 06 Jul 2026 14:35:21 GMT

Even if use Standard Channel ,the Compliance DIFF IL value still Unreliable。Because use tools S Parameter Extract Result very small

Why Cphy compliance demo simu IL result not pass? only 400mil length

JB202607048610 — Sun, 05 Jul 2026 05:05:11 GMT

RE: Why Cphy compliance demo simu IL result not pass? only 400mil length

Sumith — Mon, 06 Jul 2026 12:34:46 GMT

You can choose either the Standard or Long Channel Insertion Loss option in Compliance Check.

RE: Got Questions on Sigrity? Let’s Answer Them—LIVE on Wednesday, June 24th

EDA Star — Wed, 24 Jun 2026 15:09:21 GMT

That make sa lot of sense. I actually facd a similar issue recently on a dense board where the simulation wouldn't converge because of a tight current bottleneck near a small power pin. I cudnot widen the copper trace because of layout space, and adding more vias wasn't possible due to routing rules. In a tough spot like that where you can't just 'add more copper,' what is the next best trick in PowerDC to help a designer find a creative way out?"

Got Questions on Sigrity? Let’s Answer Them—LIVE on Wednesday, June 24th

Renu Vibha — Thu, 18 Jun 2026 13:23:47 GMT

Curious about the latest features? Facing real-world design challenges you’d like to crack faster?

This is a much awaited interactive live session with Cadence experts to get the answers you need—right when you need them.

Join us here on June 24, 2026 at 7:30 – 8:30 PM IST

Topics

PCB & IC Package S-Parameter Model Extraction
PDN Voltage Drop Analysis
High-Speed Design Simulation

This is your opportunity to:

Ask live questions
Learn from real use cases
Exchange insights with peers

Bring your challenges. Share your perspective. Be part of the conversation.

RE: Got Questions on Sigrity? Let’s Answer Them—LIVE on Wednesday, June 24th

ShivaShankarM — Wed, 24 Jun 2026 15:07:43 GMT

Thank you everyone for the great questions and engagement today. We will follow up on pending items shortly and appreciate your participation.

Regards,

Shiva Shankar M

RE: Got Questions on Sigrity? Let’s Answer Them—LIVE on Wednesday, June 24th

ShivaShankarM — Wed, 24 Jun 2026 15:06:37 GMT

If an electro-thermal simulation fails to converge, it's often an indication of a real design issue rather than just a simulation issue. The first things you should investigate are current-density hotspots, excessive IR drop, localized temperature rise, and PDN bottlenecks.

Typical fixes include:

Increasing copper width/thickness
Adding more vias or parallel current paths
Improving cooling (thermal vias, heatsinks, airflow)
Reducing load concentration and spreading current more evenly

In PowerDC, focus on regions showing the highest current density, temperature rise, and resistance increase, as these are usually the root causes preventing convergence.

RE: Got Questions on Sigrity? Let’s Answer Them—LIVE on Wednesday, June 24th

EDA Star — Wed, 24 Jun 2026 15:02:58 GMT

Hmmm...This helps... Thank you !

RE: Got Questions on Sigrity? Let’s Answer Them—LIVE on Wednesday, June 24th

ShivaShankarM — Wed, 24 Jun 2026 15:00:58 GMT

Good question, EDA Star!

Cadence provides a Clarity 3D Cut-and-Stitch flow, where EM-critical regions (such as BGA breakouts, vias, package escapes, etc.) can be solved using the Clarity 3D FEM solver, while the remaining layout is solved using PowerSI's hybrid extraction engine.

To avoid introducing artificial discontinuities, the Clarity and PowerSI regions are stitched together at consistent electrical boundaries with matching signal/reference definitions. The stitched model is then validated using metrics such as TDR continuity, impedance correlation, and IL/RL consistency before performing system-level simulations.

The resulting composite model can be analyzed in Topology Workbench/SystemSI for eye diagrams, jitter, SSN/PDN analysis, timing margin evaluation, and SerDes compliance verification.

RE: Got Questions on Sigrity? Let’s Answer Them—LIVE on Wednesday, June 24th

EDA Star — Wed, 24 Jun 2026 14:56:25 GMT

THank you...

Sometimes in high-current designs, the loop keeps heating up copper, the resistance keeps rising, and the simulation fails to converge (it errors out). When PowerDC fails to reach equilibrium, what are the best design steps to fix this thermal runaway issue?

RE: Got Questions on Sigrity? Let’s Answer Them—LIVE on Wednesday, June 24th

ShivaShankarM — Wed, 24 Jun 2026 14:53:39 GMT

In Sigrity PowerDC, electrical and thermal effects are analyzed using its electro-thermal (ET) simulation capability, which is essential because temperature directly impacts copper resistance and hence IR drop. PowerDC first solves the DC current distribution and IR drop, computes the resulting Joule heating, updates the copper conductivity/resistance based on temperature, and then re-solves the electrical network. This iterative process continues until both temperature and voltage results converge.

The key outputs are temperature hotspots, current density, copper temperature rise, resistance increase, and the resulting IR drop/voltage at sinks, allowing you to directly quantify how self-heating impacts power delivery.

RE: Got Questions on Sigrity? Let’s Answer Them—LIVE on Wednesday, June 24th

EDA Star — Wed, 24 Jun 2026 14:46:46 GMT

OK. Since you recommended a hybrid flow combining PowerSI and Clarity 3D, how do you handle the port-mapping and reference-ground alignment when stitching the 3D Clarity via-models back into the PowerSI layout to ensure no artificial discontinuities are introduced in SystemSI?

RE: Got Questions on Sigrity? Let’s Answer Them—LIVE on Wednesday, June 24th

ShivaShankarM — Wed, 24 Jun 2026 14:45:28 GMT

Engineers use field solvers because real designs involve complex 3D electromagnetic interactions, coupling, and PDN effects that simple rule-based calculations cannot accurately capture.

RE: Got Questions on Sigrity? Let’s Answer Them—LIVE on Wednesday, June 24th

EDA Star — Wed, 24 Jun 2026 14:44:27 GMT

Also..... In Cadence Sigrity PowerDC, how do we run the electrical and thermal simulation together to see how heat changes the copper resistance and affects the voltage drop?

RE: Got Questions on Sigrity? Let’s Answer Them—LIVE on Wednesday, June 24th

ShivaShankarM — Wed, 24 Jun 2026 14:41:14 GMT

Thank you for the question. Based on what you’ve shared, for DDR5 SSN analysis, it’s best to balance full-wave EM and hybrid extraction rather than treating them as alternatives. use Clarity 3D for EM-critical regions (BGA breakouts, vias, package escapes, return-path discontinuities) and PowerSI/SystemSI for the full package-board model after correlating against a representative full-wave subset.

To ensure the PDN is not degrading SI, monitor PDN impedance vs target impedance, anti-resonance peaks, VDDQ/VSS ripple, eye height/width, DQ–DQS timing margins, setup/hold margins, jitter, and SSN-induced power/ground bounce. Model validation should also include TDR, IL/RL correlation, passivity, and causality checks.

RE: Got Questions on Sigrity? Let’s Answer Them—LIVE on Wednesday, June 24th

CF202606104231 — Wed, 24 Jun 2026 14:37:55 GMT

Why do Engineers use field - solvers like PowerSI instead of rule-of-thumb calculations?

RE: Got Questions on Sigrity? Let’s Answer Them—LIVE on Wednesday, June 24th

EDA Star — Wed, 24 Jun 2026 14:33:26 GMT

When performing simultaneous switching noise (SSN) analysis for high-speed memory interfaces like DDR5 using Cadence Sigrity, how do you accurately balance the trade-off between using a full-wave 3D EM extraction versus a hybrid approach (like Sigrity PowerSI) for the package-board composite model, and what specific metrics do you look for to validate that your power delivery network (PDN) isn't degrading signal integrity?

RE: Got Questions on Sigrity? Let’s Answer Them—LIVE on Wednesday, June 24th

ShivaShankarM — Wed, 24 Jun 2026 14:10:48 GMT

To get us started, here's a common question: "How much spacing is enough to reduce crosstalk between high-speed traces?"

A quick perspective: There isn't a single rule that works for every design. Stackup, trace geometry, rise time, and reference planes all influence coupling behavior.

What crosstalk challenges have you faced in your projects?

RE: Got Questions on Sigrity? Let’s Answer Them—LIVE on Wednesday, June 24th

ShivaShankarM — Wed, 24 Jun 2026 14:00:51 GMT

Welcome everyone and thank you for joining today’s Expert Session.

Please feel free to post your questions any time—we’re here to help.

RE: Got Questions on Sigrity? Let’s Answer Them—LIVE on Wednesday, June 24th

Renu Vibha — Tue, 23 Jun 2026 10:09:16 GMT

We are all set, are you?

No matter if you’re working with Cadence Sigrity tools or exploring signal and power integrity concepts, this session is a great opportunity to

Learn from experts. Ask Questions.Grow your network.

RE: Got Questions on Sigrity? Let’s Answer Them—LIVE on Wednesday, June 24th

Renu Vibha — Mon, 22 Jun 2026 08:28:12 GMT

2 days to go!

If you’re working with Cadence Sigrity tools or exploring signal and power integrity concepts, this session is a great opportunity to get your queries clarified in real time.

Bring your questions- we'll bring the experts.

Sigrity: 'Getting Started' to 'Sign Off'

Sumith — Thu, 18 Jun 2026 06:17:27 GMT

As a new Sigrity user, what was the first setup, modeling decision, or workflow change that helped you move from ‘getting started’ to getting meaningful SI/PI results—and what do you wish you had known on day one?

PowerDC Queries

cistheta07 — Tue, 26 May 2026 07:46:03 GMT

Hi everyone,

I’m currently working on IR drop analysis using Cadence Sigrity PowerDC and exploring some of its advanced setup options. As I go through the workflow, I have a few questions related to material definition and thermal analysis.
How can I define a custom material file?
Does PowerDC support IR drop simulation across different temperature points?
What engine is used for thermal analysis in PowerDC?
Can we model active components and include the same in IR drop simulation?

Any guidance or insights would be greatly appreciated.

RE: PowerDC Queries

Sumith — Sun, 31 May 2026 18:47:17 GMT

PowerDC supports IR drop simulation across various temperature points, but it requires temperature-dependent material definitions to be set up and assigned to all objects in the database.

Please note that non-linear characteristics of active components might not be accurately captured in the simulation. However, you can define the power dissipation values for these components to enable thermal analysis.

Could you please clarify your objectives regarding the active components in this simulation?

RE: PowerDC Queries

cistheta07 — Fri, 29 May 2026 04:28:04 GMT

Hi Shiva Shankar and Community,

Thank you for sharing your insights.

It is good to know that custom materials can be defined by the Material Manager in PowerDC. Could you please guide me through the steps required to define a custom material?

At present, my primary focus is on correlating electrical results across different temperature conditions. Going forward, I would also like to explore the electro-thermal aspects of the analysis and understand how thermal distribution impacts the IR-drop behavior of the power delivery network.

I would also appreciate it if other experts in the community could share their insights or recommendations related to the other questions mentioned above.