https://community.cadence.com/cadence_technology_forums/system-analysis/en-USTelligent Community 13https://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66221/target-impedance-calculation-for-multiple-devices-on-a-shared-power-railThu, 30 Jul 2026 10:46:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:1b669e65-5a9c-4989-8c9b-2584588c60c7jillashivaA common power integrity question is whether nearby devices on the same power rail should be treated as one load or as separate loads when calculating target impedance. Target impedance is generally calculated as: Ztarget = ΔV allow / ΔI transient If multiple devices share the same rail, local PDN path, and decoupling network, the PDN sees the combined current demand. Therefore, the rail-level target impedance should normally be based on the summed worst-case transient current. Examples Scenario Current Used Example Ripple Target Impedance 1 A device + 0.1 A device 1.1 A total 50 mV 50 mV / 1.1 A = 45.5 mΩ Two nearby 1 A devices 2 A total 50 mV 50 mV / 2 A = 25 mΩ FPGA 4 A + DDR 2 A on same rail 6 A total 27 mV 27 mV / 6 A = 4.5 mΩ Practical Guideline Nearby devices on the same rail and decoupling island: use the combined worst-case transient current. Devices far apart: still use the aggregate rail current, but check local impedance and ripple at each load. Mutually exclusive activity: use the worst active current only if the assumption is validated. Key Takeaway Target impedance is primarily a property of the shared PDN/rail, not of an individual IC. Use the sum of simultaneous transient currents for the rail target, then verify each device locally for acceptable voltage ripple and impedance.https://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66220/ic-package-electrical-model-generation-using-sigrityThu, 30 Jul 2026 08:22:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:39b89751-265e-47e9-a39d-3fc33235cb0dcistheta07Hi Experts, I am currently working on an IC package modeling project where I need to generate an electrical model of the package, including the parasitic effects of bumps, BGA balls, traces, vias, and power/ground planes. The extracted model will be used for broadband signal integrity (SI) analysis, and I may need both SPICE netlist and S-parameter representations. Could you please advise which Sigrity tool would be most suitable for this application? Any suggestions or recommendations would be greatly appreciated. Thank you in advance.Power IntegritySignal IntegritySigrityXtractIMPowerSIhttps://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66194/join-us-for-our-next-live-experts-session-powersi-s-parameter-analysis-on-july-29th-2026/1409026Wed, 29 Jul 2026 15:19:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:d1427ba2-ce01-4bf2-866c-aa5a98d199a6ALLpdf3.Enable the Inductance, Capacitance, and Resistance and Broadband Impedance (Single Die-Single BGA without Decaps) options. Go to the Net Manager window and select the desired power and ground nets. 4.Go to Simulation > Start Simulation ​After the simulation is complete, the tool will display the impedance results in the Broadband Impedance tab.5. Along with the broadband impedance results, the tool also displays the inductance, capacitance, and resistance results in the Inductance, Capacitance, and Resistance tab, as shown below.https://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66194/join-us-for-our-next-live-experts-session-powersi-s-parameter-analysis-on-july-29th-2026/1409025Wed, 29 Jul 2026 15:19:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:b2f16b46-7869-4f3e-958c-729acdd1ec4eALLpdfFollow these steps to generate the S-Parameters, inductance, capacitance, and resistance of power and ground nets: In XtractIM, switch to the Electrical Performance Assessment workflow and load the design file. In the Workflow items, go to Simulation Setup > Setup for Power-Ground Analysis .This will open a Simulation Type pane at the bottom.https://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66194/join-us-for-our-next-live-experts-session-powersi-s-parameter-analysis-on-july-29th-2026/1409021Wed, 29 Jul 2026 15:15:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:d95b3e5d-c762-4696-820b-f986df272237CF202606104231How to extract S Parameters and RLC of Power and Ground Nets for a package?https://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66194/join-us-for-our-next-live-experts-session-powersi-s-parameter-analysis-on-july-29th-2026/1409017Wed, 29 Jul 2026 15:07:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:6d3c5fcd-6392-422a-bea2-87589dd02919ALLpdfTo get us started, one common question we often hear why do we need S parameter?https://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66194/join-us-for-our-next-live-experts-session-powersi-s-parameter-analysis-on-july-29th-2026/1409015Wed, 29 Jul 2026 15:02:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:b181ce6f-5f8b-40a1-859e-cd225a76a3f2ALLpdf"Welcome everyone and thank you for joining today’s Expert Session. Please feel free to post your questions any time—we’re here to helphttps://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66194/join-us-for-our-next-live-experts-session-powersi-s-parameter-analysis-on-july-29th-2026/1409003Tue, 28 Jul 2026 10:50:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:b92ff419-1efc-4f92-af75-3ba0d720cc3aRenu Vibha1 day to go! We look forward to an engaging session, do join on July 29th at 8:30-9:30PM IST .https://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66194/join-us-for-our-next-live-experts-session-powersi-s-parameter-analysis-on-july-29th-2026/1408989Mon, 27 Jul 2026 06:06:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:f9adc6fd-a7b8-41d8-9692-ff58c9d6d2f4Renu Vibha2 days to go! Don't miss this opportunity to engage and discover proven approaches to your SI challenges. Join us on Wednesday July 29th at 8:30-9:30PM ISThttps://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66194/join-us-for-our-next-live-experts-session-powersi-s-parameter-analysis-on-july-29th-2026Thu, 23 Jul 2026 10:55:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:f617a611-1393-454a-8a96-e80f2a4bdaafRenu VibhaCurious about S-Parameter extraction, Insertion Loss, and Return Loss? Join us here for a live session with Cadence experts and get answers to your toughest Signal Integrity questions. Wednesday July 29, 2026 at 8:30 PM – 9:30 PM IST Topics: S-Parameter Extraction Insertion Loss Analysis Return Loss Analysis Why Join? Ask questions live Learn from real-world use cases Gain practical SI insights Connect with peers and industry experts Don't miss this opportunity to engage directly with the experts and discover proven approaches to your SI challenges. Bring your questions. Leave with answers.https://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66133/why-cphy-compliance-demo-simu-il-result-not-pass-only-400mil-length/1408846Mon, 06 Jul 2026 14:35:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:a3e7a4af-12ad-4800-944f-5a68e88bdcf0JB202607048610Even if use Standard Channel ,the Compliance DIFF IL value still Unreliable。Because use tools S Parameter Extract Result very smallhttps://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66133/why-cphy-compliance-demo-simu-il-result-not-pass-only-400mil-length/1408842Mon, 06 Jul 2026 12:34:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:98facb39-781c-4473-b0d1-904e7b5481aeSumithYou can choose either the Standard or Long Channel Insertion Loss option in Compliance Check.https://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66133/why-cphy-compliance-demo-simu-il-result-not-pass-only-400mil-lengthSun, 05 Jul 2026 05:05:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:9f9a9f58-4faa-474e-ae2c-14706a6d05c4JB202607048610https://community.cadence.com/cadence_technology_forums/system-analysis/f/clarity-3d-solver/66127/setting-up-and-simulating-rigid-flex-designs-in-powersi-from-odb-importsThu, 02 Jul 2026 06:36:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:e25c448c-5c3f-4647-90b4-111d2d58efffALLpdfThe most robust and recommended approach is ODB++ > Allegro > PowerSI Workflow . Steps: Import the ODB++ file into Allegro . Verify and configure: Rigid‑Flex zones Stackups for rigid and flex regions Save the design as an Allegro .brd file . Import the .brd file into PowerSI for simulation. This workflow (ODB++ > .brd > .spd) is considered more stable and reliable especially for complex Rigid‑Flex designs.https://community.cadence.com/cadence_technology_forums/system-analysis/f/celsius-thermal-solver/66114/importing-icepak-model-into-celsius-ecMon, 29 Jun 2026 17:51:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:75c15f4c-b5fc-4d4b-bc3b-f69aabeeb56cNS1170Celsius EC Solver can import Icepak models upto V14.5 or earlier. To import the model, click on Import and select TZR . The models after V14.5 are encrypted and cannot be imported in Celsius EC directly. To import Icepak model, it is recommended to export the model as ECXML file. ECXML is neutral format thermal model that can be imported in Celsius EC. To import ECXML file, go to Import ribbon and click ECXML to import an ECXML file into Celsius EC Solver as a new model, a component or an assembly.https://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66087/got-questions-on-sigrity-let-s-answer-them-live-on-wednesday-june-24th/1408771Wed, 24 Jun 2026 14:33:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:b2d16d31-40af-48dc-93c4-423200fd49d2EDA StarWhen performing simultaneous switching noise (SSN) analysis for high-speed memory interfaces like DDR5 using Cadence Sigrity, how do you accurately balance the trade-off between using a full-wave 3D EM extraction versus a hybrid approach (like Sigrity PowerSI) for the package-board composite model, and what specific metrics do you look for to validate that your power delivery network (PDN) isn't degrading signal integrity?https://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66087/got-questions-on-sigrity-let-s-answer-them-live-on-wednesday-june-24th/1408770Wed, 24 Jun 2026 14:10:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:e6d7f290-4777-4967-97f5-45b10488ea6bShivaShankarMTo get us started, here's a common question: "How much spacing is enough to reduce crosstalk between high-speed traces?" A quick perspective: There isn't a single rule that works for every design. Stackup, trace geometry, rise time, and reference planes all influence coupling behavior. What crosstalk challenges have you faced in your projects?https://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66087/got-questions-on-sigrity-let-s-answer-them-live-on-wednesday-june-24th/1408769Wed, 24 Jun 2026 14:00:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:c426123d-6477-4914-b19f-26964aa7d87eShivaShankarMWelcome everyone and thank you for joining today’s Expert Session. Please feel free to post your questions any time—we’re here to help.https://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66087/got-questions-on-sigrity-let-s-answer-them-live-on-wednesday-june-24th/1408752Tue, 23 Jun 2026 10:09:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:30df64c7-a924-4833-abd0-4ffaa607f7e6Renu VibhaWe are all set, are you? No matter i f you’re working with Cadence Sigrity tools or exploring signal and power integrity concepts, this session is a great opportunity to Learn from experts. Ask Questions.Grow your network.https://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66087/got-questions-on-sigrity-let-s-answer-them-live-on-wednesday-june-24th/1408745Mon, 22 Jun 2026 08:28:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:678a1737-bd31-4897-84db-d7b4f4f8eeacRenu Vibha2 days to go! If you’re working with Cadence Sigrity tools or exploring signal and power integrity concepts, this session is a great opportunity to get your queries clarified in real time. Bring your questions- we'll bring the experts.