https://community.cadence.com/cadence_technology_forums/system-analysis/en-USTelligent Community 13https://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/70336/how-to-enforce-causality-and-passivity-automatically-in-clarity-3d-workbenchThu, 24 Sep 2026 05:21:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:6a24aec3-dbb7-45c6-bcb4-00de0d25ee42ALLpdfCausality enforcement - To enforce causality, go to Simulation> Options . It will open the Simulation Options window. Go to Electric Models and enable the Enforce causality in material parameters check box. Then, click OK . The causality will now be enforced to the generated S-Parameter. Passivity enforcement - Go to Simulation > Options . The Simulation Options window will open. Go to Basic Options and enable the Automatically check and export passive result check box. It will enforce passivity automatically to the generated S-Parameter.https://community.cadence.com/cadence_technology_forums/system-analysis/f/clarity-3d-solver/66297/join-us-on-wednesday-sep-16th-2026-for-our-next-live-ask-me-anything-session-on-trusting-simulation-clarity-at-50-ghz-and-beyond-and-discover-how-to-achieve-accurate-reliable-results-for-next-generation-high-speed-designs/1409337Wed, 16 Sep 2026 16:01:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:8e55c20f-a25d-4a6a-b5fa-a45e040547b0SumithThank you everyone for the great questions and engagement today. Feel free to post your questions and we will address them accordingly.https://community.cadence.com/cadence_technology_forums/system-analysis/f/clarity-3d-solver/66297/join-us-on-wednesday-sep-16th-2026-for-our-next-live-ask-me-anything-session-on-trusting-simulation-clarity-at-50-ghz-and-beyond-and-discover-how-to-achieve-accurate-reliable-results-for-next-generation-high-speed-designs/1409336Wed, 16 Sep 2026 15:52:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:4e87d2d6-39f6-494a-8666-e9cca538593eSumithYes, this is actually a common situation in high-frequency EM simulations. Consider a differential via structure that initially appears to perform very well up to 50 GHz. The S-parameters are smooth, insertion loss looks realistic, and there are no obvious signs of a problem. Based on the initial results, one might conclude that the design is acceptable. However, after performing mesh refinement, a previously hidden resonance may shift by several GHz, leading to a different engineering conclusion. In this case, the critical electromagnetic behavior was concentrated around the via anti-pad region, where strong fringing fields existed. The original mesh was too coarse in key areas such as: 1. Via barrels 2. Anti-pad edges 3. Plane transitions As a result, the solver technically converged and produced a numerically stable solution, but the local field behavior was not sufficiently resolved. The simulation looked accurate because the S-parameters were smooth and physically reasonable, yet the solution had not fully converged with respect to the mesh. This example highlights an important point: a simulation can appear correct and even meet convergence criteria, while still missing important physical effects due to insufficient local mesh resolution. Therefore, confidence in a result requires both: 1. Numerical convergence of the solver, and 2. Physically accurate modeling and sufficient mesh resolution in regions where electromagnetic fields are concentrated.https://community.cadence.com/cadence_technology_forums/system-analysis/f/clarity-3d-solver/66297/join-us-on-wednesday-sep-16th-2026-for-our-next-live-ask-me-anything-session-on-trusting-simulation-clarity-at-50-ghz-and-beyond-and-discover-how-to-achieve-accurate-reliable-results-for-next-generation-high-speed-designs/1409335Wed, 16 Sep 2026 15:44:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:8a1c1d85-7584-4ac6-bcd6-547f4dcee646CF202606104231Any example that you can share , practical one where convergence criteria failed and mat be simulation appeared accuratelyhttps://community.cadence.com/cadence_technology_forums/system-analysis/f/clarity-3d-solver/66297/join-us-on-wednesday-sep-16th-2026-for-our-next-live-ask-me-anything-session-on-trusting-simulation-clarity-at-50-ghz-and-beyond-and-discover-how-to-achieve-accurate-reliable-results-for-next-generation-high-speed-designs/1409334Wed, 16 Sep 2026 15:32:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:67515eab-770b-4300-87c7-bd8e8288abafSumith1. Never trust the first run. Always perform at least one mesh refinement study. 2. Check current flow and return paths, not just S-parameters. 3. Use realistic material and roughness data. 4. Simulate beyond the target frequency (e.g., 110 GHz for a 50 GHz design). 5. Ask "Why do I see this behavior?" for every resonance, notch, or loss peak. If you cannot explain it, investigate further before signing off the design.https://community.cadence.com/cadence_technology_forums/system-analysis/f/clarity-3d-solver/66297/join-us-on-wednesday-sep-16th-2026-for-our-next-live-ask-me-anything-session-on-trusting-simulation-clarity-at-50-ghz-and-beyond-and-discover-how-to-achieve-accurate-reliable-results-for-next-generation-high-speed-designs/1409333Wed, 16 Sep 2026 15:27:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:94615465-02fc-4f0f-8f94-79ef8d77faa9CF202606104231For someone new to simulation , any best practices that you can share? For results at 50Gbzhttps://community.cadence.com/cadence_technology_forums/system-analysis/f/clarity-3d-solver/66297/join-us-on-wednesday-sep-16th-2026-for-our-next-live-ask-me-anything-session-on-trusting-simulation-clarity-at-50-ghz-and-beyond-and-discover-how-to-achieve-accurate-reliable-results-for-next-generation-high-speed-designs/1409332Wed, 16 Sep 2026 15:17:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:9fc69058-d168-4729-9b6f-206e9617aff7SumithFor getting started, great question. I assume you are using a 3D FEM based solver for simulation. At 50 GHz and beyond , the most reliable indicator of accuracy is result convergence , not visual appearance. If the results remain essentially unchanged after mesh refinement, material verification, and frequency sweep refinement, the simulation is much more likely to represent the true physical behavior of the structure.https://community.cadence.com/cadence_technology_forums/system-analysis/f/clarity-3d-solver/66297/join-us-on-wednesday-sep-16th-2026-for-our-next-live-ask-me-anything-session-on-trusting-simulation-clarity-at-50-ghz-and-beyond-and-discover-how-to-achieve-accurate-reliable-results-for-next-generation-high-speed-designs/1409331Wed, 16 Sep 2026 15:12:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:4bc3915b-7d61-4b05-ab55-80ca1f48cc25CF202606104231If my simulation result looks okay, how do I know they accurately reflect behaviour at 50 GHz and beyond?https://community.cadence.com/cadence_technology_forums/system-analysis/f/clarity-3d-solver/66297/join-us-on-wednesday-sep-16th-2026-for-our-next-live-ask-me-anything-session-on-trusting-simulation-clarity-at-50-ghz-and-beyond-and-discover-how-to-achieve-accurate-reliable-results-for-next-generation-high-speed-designs/1409330Wed, 16 Sep 2026 15:05:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:dd88ab29-cb1b-4970-afe5-a9a3f244f2d4SumithWelcome everyone and thank you for joining today’s Expert Session. Please feel free to post your questions any time—we’re here to help.https://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66324/how-to-include-exact-0-hz-dc-point-in-powersi-to-avoid-low-frequency-extrapolation/1409321Tue, 15 Sep 2026 12:20:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:91ba4533-631e-42dd-9d91-c25b90b6e6fdAK20250609765Additionally, don't miss our next learning session, designed to bridge cutting-edge theory with real-world implementation. Moderated by a Cadence engineer, the discussion will provide practical guidance, proven techniques, and opportunities to engage directly with experts. Topic: Trusting Simulation Clarity at 50 GHz and Beyond Date: Wednesday, September 16, 2026 Time: 8:30 PM - 9:30 PM IST We would be delighted to have you join us.https://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66324/how-to-include-exact-0-hz-dc-point-in-powersi-to-avoid-low-frequency-extrapolation/1409320Tue, 15 Sep 2026 12:17:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:374f21fd-aba8-4d1e-ad68-8d13a0026b49AK20250609765Hi Cistheta, Thank you for your question. When accurate DC-to-high-frequency behavior is required, relying on low-frequency AC extrapolation down to 0 Hz may not provide an accurate DC reference. PowerSI provides a DC–AC fitting feature that uses PowerDC to calculate the static DC solution and incorporates it into the S-parameter model. To obtain an accurate static 0 Hz reference in PowerSI, enable the Calculate DC point as reference option under: Tools → Options → Edit Options → Simulation (Advanced) → Field Domain → PowerDC Option Alternative: Merge Existing DC and AC Models If you already possess a standalone DC model (from PowerDC or measurements) and a separate high-frequency AC S-parameter model (e.g., starting at ), you do not need to re-run the full EM extraction. PowerSI provides the Merge DC+Normal data feature, which allows the DC and AC datasets to be combined into a single S-parameter model. Please let me know if you have any further questions. Best regards, Alokhttps://community.cadence.com/cadence_technology_forums/system-analysis/f/clarity-3d-solver/66297/join-us-on-wednesday-sep-16th-2026-for-our-next-live-ask-me-anything-session-on-trusting-simulation-clarity-at-50-ghz-and-beyond-and-discover-how-to-achieve-accurate-reliable-results-for-next-generation-high-speed-designs/1409317Mon, 14 Sep 2026 08:29:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:2a55bc0f-1e2b-4d4d-9f1a-d184ceaacf11Renu Vibha2 days to go! Feel free to submit your questions now or join us LIVE on Wednesday September 16th.https://community.cadence.com/cadence_technology_forums/system-analysis/f/clarity-3d-solver/66297/join-us-on-wednesday-sep-16th-2026-for-our-next-live-ask-me-anything-session-on-trusting-simulation-clarity-at-50-ghz-and-beyond-and-discover-how-to-achieve-accurate-reliable-results-for-next-generation-high-speed-designs/1409296Thu, 10 Sep 2026 09:36:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:58939b5d-d1fc-4412-8a9b-8dfccdedc901Renu VibhaThank you for your active participation in our past sessions. We hope the discussions were helpful and that we were able to provide timely responses to your questions. As part of our continued commitment to supporting you, our next session is scheduled for September 16 , and we would be delighted to have you join us at 8:30 PM - 9:30 PM IST Topic: Trusting Simulation Clarity at 50 GHz and Beyond .https://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66325/what-has-been-your-most-challenging-signal-integrity-issue-in-a-recent-design-and-which-sigrity-features-or-workflows-proved-most-valuable-in-diagnosing-and-solving-itThu, 10 Sep 2026 07:18:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:202de8f3-201e-4cb0-b7f7-d47f079c8368Sumithhttps://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66324/how-to-include-exact-0-hz-dc-point-in-powersi-to-avoid-low-frequency-extrapolationThu, 10 Sep 2026 06:42:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:7312cd88-21ce-4983-9677-50b9f7f20079cistheta07Hi Experts, I am currently working on a high-speed PCB design that requires both Power Integrity (PI) impedance profiling and time-domain transient SPICE simulations . My analysis needs to cover the entire frequency range-from static DC up to several gigahertz. When I run standard AC S-parameter extractions in Hybrid Solvers, the solver extrapolates data at low frequencies ( below 100 kHz down to 0 Hz ). As a result, the low-frequency plane resistance ( R_dc ) isn't accurate, which distorts low-frequency die-bump impedance ( Z_die) plots and results in miscalculated bulk decoupling capacitor requirements. Additionally, if I run transient circuit simulations using these extrapolated models, my SPICE solver often experiences convergence issues due to non-physical DC offsets. How can I configure PowerSI to include an exact 0 Hz static DC point in my S-parameter extractions so I don't rely on mathematical extrapolation? Thankyou in advance.Sigrityhttps://community.cadence.com/cadence_technology_forums/system-analysis/f/clarity-3d-solver/66307/exploring-3d-via-modeling-and-simulation-using-sigrity-x-and-clarity-3d-solverThu, 03 Sep 2026 16:43:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:d83f0236-8c52-4634-a434-bc97eb666876ShivaShankarMAs data rates continue to increase, vias become a critical part of the signal path and can significantly influence overall channel performance. Accurate 3D via modeling helps engineers better understand the impact of via discontinuities, parasitic effects, return paths, and routing constraints on signal integrity. Cadence Sigrity Topology Workbench includes the Aurora Via Wizard , which enables users to create detailed 3D via structures, visualize the geometry, extract EM-accurate models using the Clarity 3D field solver, and use those models directly in system-level simulations. Key capabilities include: Defining custom stackups and cross-sections Creating single-ended or differential via structures Configuring padstacks, return paths, and keepout regions Visualizing 3D via geometry Extracting S-Parameter models using Clarity 3D Integrating the extracted via models into Topology Workbench simulations Analyzing waveform behavior and channel performance The workflow begins by adding a Via block in Topology Workbench and launching the Aurora Via Wizard from the Via Properties panel. A typical flow includes: 1. Define the Cross-Section. Create the stackup and plane definitions required for accurate via modeling. Proper reference planes are essential for successful port definition and EM extraction. 2. Configure Padstacks and Via Structures. Select padstacks, create single-ended or differential via structures, and define return vias, spacing, angles, and keepout regions. 3. Visualize the 3D Geometry. Review the generated via structure in a 3D environment to verify the physical implementation before extraction. 4. Extract the Via Model. Generate an EM-accurate S-Parameter model using the Clarity 3D field solver and automatically assign the model to the Via block in Topology Workbench. 5. Simulate and Analyze. Connect the extracted via model to transmitter and receiver blocks, perform transient simulations, and evaluate waveform quality and signal integrity metrics. By incorporating realistic via behavior into early design analysis, engineers can improve correlation between simulation and hardware performance while gaining deeper insight into channel discontinuities and interconnect effects. To learn more about 3D via modeling and simulation workflows, explore the Aurora Via Wizard capabilities available in Sigrity Topology Workbench. Click here for more details on 3D via modeling and simulation using Sigrity. Have you used 3D via models in your high-speed designs? What challenges or best practices have you observed when modeling vias for SI analysis? Share your thoughts in the comments below. Thanks & Regards, Shiva Shankar Mclarity3dsolverSignal IntegrityviaSigritysimulationhttps://community.cadence.com/cadence_technology_forums/system-analysis/f/clarity-3d-solver/66297/join-us-on-wednesday-sep-16th-2026-for-our-next-live-ask-me-anything-session-on-trusting-simulation-clarity-at-50-ghz-and-beyond-and-discover-how-to-achieve-accurate-reliable-results-for-next-generation-high-speed-designsMon, 31 Aug 2026 06:06:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:7cad7e82-8244-4829-887f-95a78ce87154Renu VibhaDon't miss our next learning session, designed to bridge cutting-edge theory with real-world implementation. Moderated by a Cadence engineer, the discussion will provide practical guidance, proven techniques, and opportunities to engage directly with experts. Wednesday, September 16, 2026 ⏰ 8:30 PM - 9:30 PM IST Topic: Trusting Simulation Clarity at 50 GHz and Beyond ✅ Ask your questions ✅ Learn from industry experts ✅ Explore proven techniques ✅ Gain practical takeaways you can apply right awayhttps://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66265/automated-layout-validation-during-pcb-package-translation-in-sigrity-clarity/1409250Thu, 27 Aug 2026 08:14:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:a1172227-eae1-49e4-9b89-e05b9586b8adAK20250609765Hi Cistheta, Yes. Sigrity and Clarity provide a Layout Validation feature that can automatically perform layout integrity checks during PCB or IC Package translation into the Sigrity/Clarity environment. When Layout Validation is enabled, the tool automatically runs a comprehensive set of error-checking functions during the translation process and can detect issues such as: Floating Nodes Geometry Errors Short Circuits Open Circuits In addition to detecting these issues, the tool can: Mark error locations directly on the layout Display warning messages for detected short circuits Control warning output limits Ignore specific warnings, such as short circuits between REF_plane and GND nets The feature can be enabled through: Tools → Options → Edit Options → Translator → Settings → Layout Validation Once enabled, validation is performed automatically during the translation of supported databases such as Cadence Allegro (.brd), ODB++, and Gerber designs into the Sigrity/Clarity environment. For automation workflows, the following TCL command can be used: sigrity::spdif_option LayoutValidation 1 1 = Enable Layout Validation 0 = Disable Layout Validation This option acts as a master validation switch , automatically executing the available layout integrity checks and applying the configured error-reporting behavior during translation. Best regards, Alokhttps://community.cadence.com/cadence_technology_forums/system-analysis/f/clarity-3d-solver/66289/how-accurate-are-your-connector-s-parametersWed, 26 Aug 2026 06:02:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:2f352037-cb80-43a2-a817-ab8028d45b71Renu VibhaEver wondered how precise your connector modeling is in complex PCB environments? Are you capturing all parasitic effects? Explore the possibilities here Clarity 3D Workbench S-parameter Extraction for Connector on PCBhttps://community.cadence.com/cadence_technology_forums/system-analysis/f/sigrity/66233/si-engineers-this-one-s-for-you---live-experts-session-on-aug-19th-2026/1409202Wed, 19 Aug 2026 15:11:00 GMT75bcbcf9-38a3-4e2e-b84b-26c8c46a9500:b65d951c-cf16-4b48-aad1-bcc7f34375b7AK20250609765Thank you everyone for the great questions and engagement today. We will follow up on pending items shortly and appreciate your participation.