******************************************************************************* ****** mirroadder schematic mirroadder mirroadder layout mirroadder ******************************************************************************* Reduce Statistics ================= Original Reduced Cell/Device schematic layout schematic layout (nmos1v) MOS 12 12 7 0* (pmos1v) MOS 12 12 7 0* (nmos1v:ParMos2#1) MosBlk - - 1 1 (nmos1v:ParMos3#1) MosBlk - - 1 1 (pmos1v:ParMos2#1) MosBlk - - 1 1 (pmos1v:ParMos3#1) MosBlk - - 1 1 (-, nmos1v:SerMos2#1) MosBlk - - - 1* (-, nmos1v:SerMos3#1) MosBlk - - - 3* (-, pmos1v:SerMos2#1) MosBlk - - - 1* (-, pmos1v:SerMos3#1) MosBlk - - - 3* Match Statistics ================ Total Unmatched Cell/Device schematic layout schematic layout (nmos1v) MOS 7 0* 7 0* (pmos1v) MOS 7 0* 7 0* (nmos1v:ParMos2#1) MosBlk 1 1 0 0 (nmos1v:ParMos3#1) MosBlk 1 1 0 0 (pmos1v:ParMos2#1) MosBlk 1 1 0 0 (pmos1v:ParMos3#1) MosBlk 1 1 0 0 (-, nmos1v:SerMos2#1) MosBlk - 1* - 1* (-, nmos1v:SerMos3#1) MosBlk - 3* - 3* (-, pmos1v:SerMos2#1) MosBlk - 1* - 1* (-, pmos1v:SerMos3#1) MosBlk - 3* - 3* ------ ------ ------ ------ Total 18 12 14 8 Match Statistics for Nets 17 12 9 4 ===================================================================[mirroadder] ====== Bad Initial Net Bindings (nets don't match) ============================ =============================================================================== = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (badbind 1) Schematic Net: gnd S *2 of nmos1v {D S} S *2 of nmos1v B S *1 of nmos1v:ParMos3#1 {OUT OUT2} S 1 of nmos1v:ParMos3#1 TERM4 S *1 of nmos1v:ParMos2#1 {OUT OUT2} S 1 of nmos1v:ParMos2#1 TERM4 Layout Net: gnd L 1 of nmos1v:ParMos3#1 TERM4 L 1 of nmos1v:ParMos2#1 TERM4 L *3 of nmos1v:SerMos3#1 ?{OUT OUT2} L *3 of nmos1v:SerMos3#1 ?TERM4 L *1 of nmos1v:SerMos2#1 ?{OUT OUT2} L *1 of nmos1v:SerMos2#1 ?TERM4 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (badbind 2) Schematic Net: vdd S *2 of pmos1v {D S} S *2 of pmos1v B S *1 of pmos1v:ParMos3#1 {OUT OUT2} S 1 of pmos1v:ParMos3#1 TERM4 S *1 of pmos1v:ParMos2#1 {OUT OUT2} S 1 of pmos1v:ParMos2#1 TERM4 Layout Net: vdd L 1 of pmos1v:ParMos3#1 TERM4 L 1 of pmos1v:ParMos2#1 TERM4 L *3 of pmos1v:SerMos3#1 ?{OUT OUT2} L *3 of pmos1v:SerMos3#1 ?TERM4 L *1 of pmos1v:SerMos2#1 ?{OUT OUT2} L *1 of pmos1v:SerMos2#1 ?TERM4 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (badbind 3) Schematic Net: a S *2 of nmos1v G S *2 of pmos1v G S 1 of nmos1v:ParMos3#1 {IN1 IN2 IN3} S 1 of nmos1v:ParMos2#1 {IN1 IN2} S 1 of pmos1v:ParMos3#1 {IN1 IN2 IN3} S 1 of pmos1v:ParMos2#1 {IN1 IN2} Layout Net: a L 1 of nmos1v:ParMos3#1 {IN1 IN2 IN3} L 1 of nmos1v:ParMos2#1 {IN1 IN2} L 1 of pmos1v:ParMos3#1 {IN1 IN2 IN3} L 1 of pmos1v:ParMos2#1 {IN1 IN2} L *1 of nmos1v:SerMos3#1 ?{IN1 IN2 IN3} L *1 of nmos1v:SerMos2#1 ?{IN1 IN2} L *1 of pmos1v:SerMos3#1 ?{IN1 IN2 IN3} L *1 of pmos1v:SerMos2#1 ?{IN1 IN2} = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (badbind 4) Schematic Net: b S *2 of nmos1v G S *2 of pmos1v G S 1 of nmos1v:ParMos3#1 {IN1 IN2 IN3} S 1 of nmos1v:ParMos2#1 {IN1 IN2} S 1 of pmos1v:ParMos3#1 {IN1 IN2 IN3} S 1 of pmos1v:ParMos2#1 {IN1 IN2} Layout Net: b L 1 of nmos1v:ParMos3#1 {IN1 IN2 IN3} L 1 of nmos1v:ParMos2#1 {IN1 IN2} L 1 of pmos1v:ParMos3#1 {IN1 IN2 IN3} L 1 of pmos1v:ParMos2#1 {IN1 IN2} L *1 of nmos1v:SerMos3#1 ?{IN1 IN2 IN3} L *1 of nmos1v:SerMos2#1 ?{IN1 IN2} L *1 of pmos1v:SerMos3#1 ?{IN1 IN2 IN3} L *1 of pmos1v:SerMos2#1 ?{IN1 IN2} = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (badbind 5) Schematic Net: c S *2 of nmos1v G S *2 of pmos1v G S 1 of nmos1v:ParMos3#1 {IN1 IN2 IN3} S 1 of pmos1v:ParMos3#1 {IN1 IN2 IN3} Layout Net: c L 1 of nmos1v:ParMos3#1 {IN1 IN2 IN3} L 1 of pmos1v:ParMos3#1 {IN1 IN2 IN3} L *1 of nmos1v:SerMos3#1 ?{IN1 IN2 IN3} L *1 of pmos1v:SerMos3#1 ?{IN1 IN2 IN3} = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (badbind 6) Schematic Net: cobar S *2 of nmos1v {D S} S *1 of nmos1v G S *2 of pmos1v {D S} S *1 of pmos1v G Layout Net: cobar L *1 of nmos1v:SerMos3#1 ?{OUT OUT2} L *1 of nmos1v:SerMos3#1 ?{IN1 IN2 IN3} L *1 of nmos1v:SerMos2#1 ?{OUT OUT2} L *1 of pmos1v:SerMos3#1 ?{OUT OUT2} L *1 of pmos1v:SerMos3#1 ?{IN1 IN2 IN3} L *1 of pmos1v:SerMos2#1 ?{OUT OUT2} = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (badbind 7) Schematic Net: sumbar S *2 of nmos1v {D S} S *2 of pmos1v {D S} Layout Net: sumbar L *2 of nmos1v:SerMos3#1 ?{OUT OUT2} L *2 of pmos1v:SerMos3#1 ?{OUT OUT2} ===================================================================[mirroadder] ====== Unmatched Internal Nets ================================================ =============================================================================== S ?net5 S ?net8 S ?net13 S ?net12 S ?net1 S ?net2 S ?net3 S ?net10 S ?net9 L ?N##19 L ?N##20 L ?N##21 L ?N##22 ===================================================================[mirroadder] ====== Bad Matched Nets (don't really match) ================================== =============================================================================== = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =(badmatch 1) Schematic Net: net6 S *2 of pmos1v {D S} S *1 of pmos1v B Layout Net: avS47 L *1 of nmos1v:SerMos3#1 ?{IN1 IN2 IN3} L *1 of pmos1v:SerMos3#1 ?{IN1 IN2 IN3} ===================================================================[mirroadder] ====== Problem Schematic Nets (no exact match in layout) ====================== =============================================================================== S S ?net1 ?net2 ?net10 S (total 3) with: S 2 of nmos1v {D S} S 1 of nmos1v B S S ?sumbar S 2 of nmos1v {D S} S 2 of pmos1v {D S} S S ?net6 ?net5 ?net13 S (total 3) with: S 2 of pmos1v {D S} S 1 of pmos1v B S S ?net3 S 1 of nmos1v {D S} S 1 of nmos1v B S 1 of nmos1v:ParMos3#1 {OUT OUT2} S S ?net9 S 1 of nmos1v {D S} S 1 of nmos1v B S 1 of nmos1v:ParMos2#1 {OUT OUT2} S S ?net8 S 1 of pmos1v {D S} S 1 of pmos1v B S 1 of pmos1v:ParMos3#1 {OUT OUT2} S S ?net12 S 1 of pmos1v {D S} S 1 of pmos1v B S 1 of pmos1v:ParMos2#1 {OUT OUT2} S S ?cobar S 2 of nmos1v {D S} S 1 of nmos1v G S 2 of pmos1v {D S} S 1 of pmos1v G S S ?c S 2 of nmos1v G S 2 of pmos1v G S 1 of nmos1v:ParMos3#1 {IN1 IN2 IN3} S 1 of pmos1v:ParMos3#1 {IN1 IN2 IN3} S S ?gnd S 2 of nmos1v {D S} S 2 of nmos1v B S 1 of nmos1v:ParMos3#1 {OUT OUT2} S 1 of nmos1v:ParMos3#1 TERM4 S 1 of nmos1v:ParMos2#1 {OUT OUT2} S 1 of nmos1v:ParMos2#1 TERM4 S S ?a ?b S (total 2) with: S 2 of nmos1v G S 2 of pmos1v G S 1 of nmos1v:ParMos3#1 {IN1 IN2 IN3} S 1 of nmos1v:ParMos2#1 {IN1 IN2} S 1 of pmos1v:ParMos3#1 {IN1 IN2 IN3} S 1 of pmos1v:ParMos2#1 {IN1 IN2} S S ?vdd S 2 of pmos1v {D S} S 2 of pmos1v B S 1 of pmos1v:ParMos3#1 {OUT OUT2} S 1 of pmos1v:ParMos3#1 TERM4 S 1 of pmos1v:ParMos2#1 {OUT OUT2} S 1 of pmos1v:ParMos2#1 TERM4 ===================================================================[mirroadder] ====== Problem Layout Nets (no exact match in schematic) ====================== =============================================================================== L L ?N##19 L 2 of nmos1v:ParMos3#1 {OUT OUT2} L 2 of nmos1v:SerMos3#1 ?{IN1 IN2 IN3} L L ?N##20 L 2 of nmos1v:ParMos2#1 {OUT OUT2} L 2 of nmos1v:SerMos3#1 ?{IN1 IN2 IN3} L L ?N##21 L 2 of pmos1v:ParMos3#1 {OUT OUT2} L 2 of pmos1v:SerMos3#1 ?{IN1 IN2 IN3} L L ?N##22 L 2 of pmos1v:ParMos2#1 {OUT OUT2} L 2 of pmos1v:SerMos3#1 ?{IN1 IN2 IN3} L L ?sumbar L 2 of nmos1v:SerMos3#1 ?{OUT OUT2} L 2 of pmos1v:SerMos3#1 ?{OUT OUT2} L L ?avS47 L 1 of nmos1v:SerMos3#1 ?{IN1 IN2 IN3} L 1 of pmos1v:SerMos3#1 ?{IN1 IN2 IN3} L L ?c L 1 of nmos1v:ParMos3#1 {IN1 IN2 IN3} L 1 of pmos1v:ParMos3#1 {IN1 IN2 IN3} L 1 of nmos1v:SerMos3#1 ?{IN1 IN2 IN3} L 1 of pmos1v:SerMos3#1 ?{IN1 IN2 IN3} L L ?gnd L 1 of nmos1v:ParMos3#1 TERM4 L 1 of nmos1v:ParMos2#1 TERM4 L 3 of nmos1v:SerMos3#1 ?{OUT OUT2} L 3 of nmos1v:SerMos3#1 ?TERM4 L 1 of nmos1v:SerMos2#1 ?{OUT OUT2} L 1 of nmos1v:SerMos2#1 ?TERM4 L L ?vdd L 1 of pmos1v:ParMos3#1 TERM4 L 1 of pmos1v:ParMos2#1 TERM4 L 3 of pmos1v:SerMos3#1 ?{OUT OUT2} L 3 of pmos1v:SerMos3#1 ?TERM4 L 1 of pmos1v:SerMos2#1 ?{OUT OUT2} L 1 of pmos1v:SerMos2#1 ?TERM4 L L ?cobar L 1 of nmos1v:SerMos3#1 ?{OUT OUT2} L 1 of nmos1v:SerMos3#1 ?{IN1 IN2 IN3} L 1 of nmos1v:SerMos2#1 ?{OUT OUT2} L 1 of pmos1v:SerMos3#1 ?{OUT OUT2} L 1 of pmos1v:SerMos3#1 ?{IN1 IN2 IN3} L 1 of pmos1v:SerMos2#1 ?{OUT OUT2} L L ?a ?b L (total 2) with: L 1 of nmos1v:ParMos3#1 {IN1 IN2 IN3} L 1 of nmos1v:ParMos2#1 {IN1 IN2} L 1 of pmos1v:ParMos3#1 {IN1 IN2 IN3} L 1 of pmos1v:ParMos2#1 {IN1 IN2} L 1 of nmos1v:SerMos3#1 ?{IN1 IN2 IN3} L 1 of nmos1v:SerMos2#1 ?{IN1 IN2} L 1 of pmos1v:SerMos3#1 ?{IN1 IN2 IN3} L 1 of pmos1v:SerMos2#1 ?{IN1 IN2} ===================================================================[mirroadder] ====== Matched Instances with Bad Net Connections ============================= =============================================================================== = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =(badcon 1) Schematic Instance: I##25 nmos1v:ParMos3#1 Layout Instance: I##29 nmos1v:ParMos3#1 Pin SchNet : LayNet --- ------ : ------ OUT ?net3 : ?N##19 OUT2 gnd : ?N##19 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =(badcon 2) Schematic Instance: I##26 nmos1v:ParMos2#1 Layout Instance: I##30 nmos1v:ParMos2#1 Pin SchNet : LayNet --- ------ : ------ OUT ?net9 : ?N##20 OUT2 gnd : ?N##20 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =(badcon 3) Schematic Instance: I##27 pmos1v:ParMos3#1 Layout Instance: I##31 pmos1v:ParMos3#1 Pin SchNet : LayNet --- ------ : ------ OUT ?net8 : ?N##21 OUT2 vdd : ?N##21 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =(badcon 4) Schematic Instance: I##28 pmos1v:ParMos2#1 Layout Instance: I##32 pmos1v:ParMos2#1 Pin SchNet : LayNet --- ------ : ------ OUT ?net12 : ?N##22 OUT2 vdd : ?N##22 ===================================================================[mirroadder] ====== Unmatched Schematic Instances ========================================== =============================================================================== = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (schinst 1) Schematic Instance: NM11 nmos1v S Pin Net S --- --- S D ?net1 S G b S S gnd S B gnd = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (schinst 2) Schematic Instance: NM10 nmos1v S Pin Net S --- --- S D ?net2 S G a S S ?net1 S B ?net1 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (schinst 3) Schematic Instance: NM9 nmos1v S Pin Net S --- --- S D sumbar S G c S S ?net2 S B ?net2 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (schinst 4) Schematic Instance: NM8 nmos1v S Pin Net S --- --- S D sumbar S G cobar S S ?net3 S B ?net3 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (schinst 5) Schematic Instance: NM4 nmos1v S Pin Net S --- --- S D cobar S G b S S ?net10 S B ?net10 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (schinst 6) Schematic Instance: NM3 nmos1v S Pin Net S --- --- S D ?net10 S G a S S gnd S B gnd = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (schinst 7) Schematic Instance: NM0 nmos1v S Pin Net S --- --- S D cobar S G c S S ?net9 S B ?net9 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (schinst 8) Schematic Instance: PM11 pmos1v S Pin Net S --- --- S D net6 S G b S S vdd S B vdd = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (schinst 9) Schematic Instance: PM10 pmos1v S Pin Net S --- --- S D ?net5 S G a S S net6 S B net6 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =(schinst 10) Schematic Instance: PM9 pmos1v S Pin Net S --- --- S D sumbar S G c S S ?net5 S B ?net5 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =(schinst 11) Schematic Instance: PM5 pmos1v S Pin Net S --- --- S D sumbar S G cobar S S ?net8 S B ?net8 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =(schinst 12) Schematic Instance: PM4 pmos1v S Pin Net S --- --- S D cobar S G b S S ?net13 S B ?net13 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =(schinst 13) Schematic Instance: PM3 pmos1v S Pin Net S --- --- S D ?net13 S G a S S vdd S B vdd = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = =(schinst 14) Schematic Instance: PM0 pmos1v S Pin Net S --- --- S D cobar S G c S S ?net12 S B ?net12 ===================================================================[mirroadder] ====== Unmatched Layout Instances ============================================= =============================================================================== = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (layinst 1) Layout Instance: I##25 nmos1v:SerMos3#1 L Pin Net L --- --- L OUT gnd L OUT2 sumbar L TERM4 gnd L IN1 b L IN2 a L IN3 net6 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (layinst 2) Layout Instance: I##26 nmos1v:SerMos2#1 L Pin Net L --- --- L OUT gnd L OUT2 cobar L TERM4 gnd L IN1 a L IN2 b = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (layinst 3) Layout Instance: I##27 pmos1v:SerMos3#1 L Pin Net L --- --- L OUT vdd L OUT2 sumbar L TERM4 vdd L IN1 b L IN2 a L IN3 net6 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (layinst 4) Layout Instance: I##28 pmos1v:SerMos2#1 L Pin Net L --- --- L OUT vdd L OUT2 cobar L TERM4 vdd L IN1 a L IN2 b = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (layinst 5) Layout Instance: I##33 nmos1v:SerMos3#1 L Pin Net L --- --- L OUT gnd L OUT2 sumbar L TERM4 gnd L IN1 ?N##19 L IN2 ?N##19 L IN3 cobar = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (layinst 6) Layout Instance: I##34 nmos1v:SerMos3#1 L Pin Net L --- --- L OUT gnd L OUT2 cobar L TERM4 gnd L IN1 ?N##20 L IN2 ?N##20 L IN3 c = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (layinst 7) Layout Instance: I##35 pmos1v:SerMos3#1 L Pin Net L --- --- L OUT vdd L OUT2 sumbar L TERM4 vdd L IN1 ?N##21 L IN2 ?N##21 L IN3 cobar = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = (layinst 8) Layout Instance: I##36 pmos1v:SerMos3#1 L Pin Net L --- --- L OUT vdd L OUT2 cobar L TERM4 vdd L IN1 ?N##22 L IN2 ?N##22 L IN3 c ===================================================================[mirroadder] ====== Summary of Errors ====================================================== =============================================================================== Schematic Layout Error Type --------- ------ ---------- 7 7 Bad Initial Net Bindings 1 1 Bad Matched Nets 9 4 Unmatched Internal Nets 4 4 Matched Instances with Bad Net Connections 14 8 Unmatched Instances