xrun(64): 25.03-s005: (c) Copyright 1995-2025 Cadence Design Systems, Inc.
TOOL:	xrun(64)	25.03-s005: Started on Oct 06, 2025 at 10:48:41 PDT
xrun
	-f xrunArgs
		-UNBUFFERED
		-cdslib ./cds.lib
		-errormax 50
		-status
		-nowarn DLNOHV
		-nowarn DLCLAP
		-v93
		-incdir /Project_Path/ProjectX/cadence/
		-ade
		-timescale 1ns/1ns
		-vtimescale 1ns/1ns
		-delay_mode None
		-novitalaccl
		-access r
		-noparamerr
		-amspartinfo ../psf/partition.info
		-rnm_partinfo
		-modelincdir /Project_Path/ProjectX/cadence/
		./spiceModels.scs
		./amsControlSpectre.scs
		-input ./probe.tcl
		-run
		-exit
		-xmsimargs "+amsrawdir ../psf"
		-spectre_args "-ahdllibdir /scratch/simulation/ProjectX/testcases/tb_testcase_ams_include_vars/maestro/results/maestro/Interactive.2/sharedData/CDS/ahdl/input.ahdlSimDB"
		-spectre_args +logstatus
		-simcompatible_ams spectre
		-name testcases.tb_testcase_ams_include_vars:config
		-allowredefinition
		-amsbind
		-top testcases.tb_testcase_ams_include_vars:schematic
		-top cds_globals
		./netlist.vams
		./ie_card.scs
		-f ./textInputs
			-amscompilefile "file:/Project_Path/ProjectX/cadence/testcases/testcase_veriloga/veriloga/veriloga.va ftype:va lib:testcases cell:testcase_veriloga view:veriloga"
		./cds_globals.vams
		-l ../psf/xrun.log
		-spectre_args "+preset=mx +mt"
file: ./netlist.vams
	module testcases.tb_testcase_ams_include_vars:schematic
		errors: 0, warnings: 0
file: ./cds_globals.vams
	module worklib.cds_globals:vams
		errors: 0, warnings: 0
xmvlog: *W,SPDUSD: Include directory /Project_Path/ProjectX/cadence/ given but not used.
	Total errors/warnings found outside modules and primitives:
		errors: 0, warnings: 1
xmvlog: Memory Usage - Current physical: 25.8M, Current virtual: 53.5M, Peak physical: 25.8M
xmvlog: CPU Usage - 0.0s system + 0.0s user = 0.0s total (0.0s, 100.0% cpu)
		Caching library 'testcases' ....... Done
		Caching library 'worklib' ....... Done
	Elaborating the design hierarchy:
xmelab: *N,MSFLON: Xcelium will initiate mixed signal elaboration, Reason: .amsbind.scs.
	Top level design units:
		tb_testcase_ams_include_vars
		cds_globals
testcase_veriloga #(.test_var_file(cds_globals.test_val_file), .test_var_gui(cds_globals.test_val_gui)) I0 (.out_file( out_file ), .out_gui( out_gui ), .clk( clk ));
                                                           |
xmelab: *E,CUVHNF (./netlist.vams,28|59): Hierarchical name component lookup failed at 'cds_globals.test_val_file'.
xmelab: Memory Usage - Final: 63.0M, Peak: 63.0M, Peak virtual: 145.8M
xmelab: CPU Usage - 0.1s system + 0.0s user = 0.1s total (0.1s, 100.0% cpu)
xrun: *E,ELBERR: Error (*E) or soft error (*SE) occurred during elaboration (status 1), exiting.
TOOL:	xrun(64)	25.03-s005: Exiting on Oct 06, 2025 at 10:48:54 PDT  (total: 00:00:13)