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Corporate News

Cadence Launches Cache-Coherent HiFi 5s SMP for Next-Gen Audio Applications

Next-generation consumer and automotive audio is becoming increasingly sophisticated…

Corporate
• 4 min read
news story , featured , Symmetric Multiprocessing , audio , Silicon Solutions

Verification

Cadence Welcomes VLAB Works

Cadence welcomes VLAB Works, a division of Australian Semiconductor Technology Corporation…

Corporate
• less than a min read
Automotive , featured , Virtual Development Environment , vlab , Protium

Academic Network

Accelerating Innovation: The SolarCar at Virginia Tech Team

At a time when sustainability and innovation are beautifully coming together, the…

Kira Jones
• 2 min read
featured , Cadence Academic Network , CFD Simulations , Solar Car

Corporate News

Driving the Future of High-Speed Computing with PCIe 7.0 Innovation

Escalating compute processing demands from generative and agentic AI applications…

Corporate
• 4 min read
controller IP , Verification IP , featured , agentic ai , PHY
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Blog - Post List

Latest blogs

Corporate News

Quantum Machines - Pushing the Boundaries of Quantum Computing

Quantum computing is opening the door to solving problems beyond the reach of classical…

Tanushri Shah
• 2 min read
quantum computing , designed with cadence

Academic Network

Develop the Intelligent Systems of Tomorrow with Cadence Tools

Set yourself up for success by taking advantage of your access to leading-edge Cadence…

Kira Jones
• 2 min read
Cadence Academic Network , CFD Simulations , oncloud , Multiphysics analysis , RF design , PCB design

Analog/Custom Design

Design Smart, Sign Off Smarter: Voltus-XFi for Transistor-Level Power Signoff

Imagine you've just built your dream home. You’ve double-checked the plumbing, inspected…

Sree Parvathy
• 5 min read
Analog Design Environment , Cadence blogs , Virtuoso Studio , custom/analog , ADE Explorer , Routing , Virtuoso Layout EXL , analog , Virtuoso Visualization and Analysis XL , training , Layout Suite , Virtuoso Analog Design Environment , digital badges , training bytes , Layout , Virtuoso , Spectre , Cadence certified , Analog Design Environment , ViVA , Virtuosity , cadenceblogs , Virtuoso Video Diary , Circuit Design , Cadence Education Services , analog design , spectre x , Custom IC Design , online training , Virtuoso Layout Suite , Custom IC , Cadence Community , Assembler , Spectre X Simulator , ADE Assembler , IC23.1

System, PCB, & Package Design 

Training Insights: Migrating from Allegro DE-HDL to Allegro X System Capture

Explore the strategic and technical benefits of transitioning to Allegro X System…

AsadMakandar
• 2 min read
PCB , webinar , Design Entry HDL , PCB design , allegro x , Allegro , Allegro X System Capture

Learning and Support

GenAI-Powered ASK AI Assistant Now Live on Cadence ASK Portal

You might remember the blog about the GenAI Feature on Cadence ASK that we published…

Sachin Nagpal
• 1 min read

中文技术专区

瑞芯微 RK2118 集成 Cadence Tensilica HiFi 4 DSP 提供强大的音频处理

搭载 Cadence Tensilica HiFi 4 DSP的 Rockchip RK2118 系统级芯片（SoC）已于 2024 年第四季度投入量产。这款尖端的…

Yaoyao Wang
• less than a min read
DSP , 音频处理 , HiFi , SoC , Tensilica

System, PCB, & Package Design 

PCB Design Workflow Using Sigrity X for Signal and Power Integrity Analysis

Jasmine Vital Muniz, Electrical Engineer, OLogic, Inc. While many electronic design…

MSATeam
• 1 min read
PCB , SIPI , Sigrity X , Power Integrity , SI/PI Analysis , Signal Integrity

SoC and IP

Redefining SoC Design: The Shift to Secure Chiplet-Based Architectures

The semiconductor industry is undergoing a paradigm shift from monolithic system…

Moshiko Emmer
• 5 min read
security , Automotive , chiplets , physical ai , SoC

中文技术专区

Enkl Sound 利用 Tensilica HiFi DSP 优化音频技术，缔造无与伦比的卓越音质

在快速发展的音频技术领域，Enkl Sound Copenhagen 宛如一座创新的灯塔，将经典斯堪的纳维亚设计与前沿数字声音处理技术相融合，而促成这种融合的核心…

Yaoyao Wang
• less than a min read

Corporate News

Cadence Launches Cache-Coherent HiFi 5s SMP for Next-Gen Audio Applications

Next-generation consumer and automotive audio is becoming increasingly sophisticated…

Corporate
• 4 min read
news story , featured , Symmetric Multiprocessing , audio , Silicon Solutions , HiFi , Front Page Press Release , SMP , Tensilica , SSG , Xtensa

Verification

Cadence Welcomes VLAB Works

Cadence welcomes VLAB Works, a division of Australian Semiconductor Technology Corporation…

Corporate
• less than a min read
Automotive , featured , Virtual Development Environment , vlab , Protium , Palladium , xcelium , VDE , helium , System Verification

中文技术专区

Cadence UCIe IP 在 Samsung Foundry 的 5nm 汽车工艺上实现流片成功

我们很高兴能在此宣布，Cadence 基于UCIe 标准封装 IP 已在 Samsung Foundry 的 5nm 汽车工艺上实现首次流片成功。这一里程碑彰显了我们持续提供高性能车规级IP解决方案…

Yaoyao Wang
• less than a min read

RF Engineering

Empowering RF Power: Must-See Video Series for AWR Users!

Calling all AWR Microwave and RF designers—getting the most out of your tools just…

PratigyaM
• 1 min read
RF , RF Simulation , analog/RF , Cadence Academic Network , AWR Design Environment , Virtuoso RF , Electromagnetic analysis , Analyst 3D FEM EM Simulator , RF design , AWR Microwave Office , AXIEM 3D Planar Simulator , microwave office , Visual System Simulator (VSS)

System, PCB, & Package Design 

Cadence Customers Share Experiences with Revolutionary PCB Design Methodology

PCB design teams are often caught in a repetitive cycle of design and simulation…

MSATeam
• 3 min read
Automotive , si/pi , Sigrity X Aurora , MIPI , PCB design , ADAS , allegro x

Academic Network

Accelerating Innovation: The SolarCar at Virginia Tech Team

At a time when sustainability and innovation are beautifully coming together, the…

Kira Jones
• 2 min read
featured , Cadence Academic Network , CFD Simulations , Solar Car

SoC and IP

Cadence Leads the Way at PCI-SIG DevCon 2025 with Groundbreaking PCIe 7.0 Demos

As we move through 2025, the momentum generated by Cadence continues to energize…

Joe C
• 2 min read
PCIe 7.0 , PCIe , PCI-SIG

Learning and Support

Analog and Digital IC Design Flows: The Past, Present, and Future of Electronics

Curious to see how your IC design skills (Analog/Digital) stack up—or where to level…

P Saisrinivas
• 8 min read
college grads , digital design , blended training , AIML , specifications , xcellium , Custom IC flow , onboarding , Genus , Analog IC Flow , schematic design , GDSII , chip design , Tempus , pegasus , ASIC flow , RTL , video , Self Learning , tutorial , 3DIC , Cadence Online Support , APR , Digital IC Flow , Virtuoso ADE , place and route , Cadence training , digital badges , learninggap , training bytes , Virtuoso , Design and Verification , Semiconductor , Spectre , learnfast , Post Layout , Digital Implementation , GenAI , Innovus , physical design , Layout design , mobile , Virtuoso Layout , learning and support , Pre Layout , Verisium Manager , Quantus , online training , simulation , silicon , Digital Physical Design , Tape-out

Digital Design

Elevate Your EDA Skills: Achieve Unmatched PPA with Genus Synthesis Solution

As the electronic design automation (EDA) landscape continues to evolve, the importance…

Neha Joshi
• 4 min read
training , training bytes , Optimize , Genus Synthesis Solution , Synthesis , online training

System, PCB, & Package Design 

Discover Cadence Community Forums Resources for Tcl Scripting

In the world of PCB design and IC packaging, automation is key to enhancing productivity…

Renu Vibha
• 2 min read
PCB , Allegro X AI , cadence , awr , Tcl Scripting , Cadence Community Forums , community forum , SPB , PCB design
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