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本文作者：Tyler Lockman，Cadence Software Architect，于加拿大卡尔顿大学获计算机科学学士学位后，在Cadence Allegro产品部门工作超过20年，专注于IC封装与中介层基板设计。同时，参与全Allegro平台、Virtuoso、PVS、OrbitIO及 Innovus产品的核心工作。 space 如果您曾经尝试过去除设计的某个区域，您可能会发现这个过程比想象的更加复杂。 如果我们使用显示元素（show element）功能来选择该区域中的铺面，就会选中...

CadenceLIVE Taiwan 2021熱鬧非凡，活動當天即上千人湧入參與，無論是專題演講、技術分享以及技術論壇，場場人氣爆棚。感謝所有踴躍參與的朋友們，讓Cadence在半導體與電子設計與開發的路上，更向前邁出一大步!今年的CadenceLIVE Taiwan 2021專題演講由Cadence執行長陳立武(Lip-bu Tan)領銜，帶來『推動半導體產業的復興 (Fueling the Semiconductor Renaissance)』的專題演講。陳立武執行長認為5G 通訊、IoT、...

We will not let today's gray and wet weather in Fort Worth (home of Cadence's Pointwise team) put a damper on the week's CFD news which contains something from the highbrow to the sophomoric. Read about the state of the aerospace industr...

Cadence has quite a long history of releasing Generic PDKs for demonstration purposes. All Rapid Adoption Kits (RAKs) are based on one of the GPDKs, which are downloadable from support.cadence.com . For academic users, GPDK has the pleasant side ...

This Blog shows how the Virtuoso Schematic Editor tool provides numerous capabilities to facilitate fast and easy design entry. The main key benefit of speeding the common design entry tasks by 5x. It also mentions about product family providing a flexible set of product performance levels, such as Virtuoso...

Design and Test Europe, normally known as just DATE, is back to its usual March schedule for 2022. It will take place from 14th to 23rd March. The plans are for this to be a hybrid event, with the on-site portion taking place in Antwerp, a port city ...

We all want to be sure, or as sure as we can be, that our products will work as expected in the real world under circumstances that may not always be under our control or per our specifications. We want to be adequately aware of how the output of the...

I used to have this calculator, and I have a feeling it is actually somewhere in my office at Cadence, but since I've not been there for over 18 months I can't really check. This is the Braun ET66 calculator. The chief designer at Braun was D...

Use AXL-SKILL and customized toolbars and icons to access frequently performed tasks that you have automated. Your own set of menus and icons for ease and speed...

Coming up on 20th October is this year's CadenceConnect Mission Critical event. It will be a digital event. Note that all times given in this blog post are Eastern, not Pacific like many Cadence events. If you are on the West coast, don'...

I grew up in a town where nearly 80% of the population identifies as Hispanic or Latino. Being proud of my culture and background is something that I continuously celebrate and carried with me when I started working in tech, where Hispanics and Latin...

Aircraft that operate from ships at sea must navigate the turbulent airwake environment surrounding the ship in a variety of atmospheric and sea states that can make these operations challenging and risky for pilots. It is important to understand the...

Recently, Cadence presented a webinar Celsius Thermal Solver for Electronic Design - Thermal LIVE. Melika Roshandell presented the product. She is the product marketing director for Celsius, following on 9 years as a thermal engineer at Qualcom...

Paying attention to how you mesh your EM structures is as important as quality port definitions. The density of your mesh plays a big role in the accuracy/performance tradeoff that you make in the EM simulations. EMX Planar 3D Solver provides several controls to define mesh density in conductors and...

In mid-September, Jim Hogan's children organized A Celebration of Life at his house. Almost everyone in EDA, at least anyone over about 40, knew Jim and many of us have stories. He was usually referred to as "Hogan" since...

对包含键合线IC的RF模组进行电磁场分析，一个重要的任务就是捕获封装和键合线中间的耦合。阅读这篇博客可以让您知道如何通过Virtuoso RF Solution快速方便有效地实现这个目的。

OrCAD® および Allegro®のHotFix 019 (QIR 3, アプリケーションのスプラッシュ画面で は “2021.1” と表示されます) の更新プログラムが Cadence Downloads にリリースされました。(訳注. 現在の最新はHotFix 021です。) このブログ記事では、この更新プログラムにアクセスするための重要なリンクと、主な変更や新機能についての概要をご紹介します。 OrCAD/Allegro 17.4 ...

The Cadence Scholarship Program is the flagship CSR program of Cadence India, introduced five years ago. Many meritorious students from under-served sections of society drop out of the education system after school because of the lack of finances. Th...

Even with the DRAM capacity going up with each generation of DRAM, the demand for memory densities by variety of applications, is growing at even faster rate. To support these high memory densities and bus width requirements (that are typically more than what a single DRAM can support) almost all...

https://youtu.be/ATY2E8tvqgs Made on Lumen5 by me Monday: BlackHat: Do We Want a National Cybersecurity Safety Board? Tuesday: Magnetic Tape Drives Wednesday: JP Morgan Report: Dude, Where's My Stuff? Thursday: Announcing Integrity 3D-IC Fri...

本文翻译自Cadence “Breakfast Bytes Blogs”专栏作者Paul McLellan文章“ Allegro X, the Design Platform for the Next Generation of Intelligent System Design "。 space Cadence在打造大多数软件时都有一个共同的思路：将软件原生地集成在通用数据库上，以避免数据库转换可能造成的信息误差。这就好比当我们想用翻译软件把文字从法...

Welcome to another round-up, compilation, summary, compendium, and rehash of CFD news from around the internet. What's inside? How new insight on the source of fluid drag came from quantum mechanics. Examples of applied CFD for the marine, autom...

The Sigrity and Systems Analysis (SIGRITY/SYSANLS) 2021.1 HF3 release is now available for download at Cadence Downloads. For the list of CCRs fixed in the 2021.1 HF3 release, see the README.txt file in the installation hierarchy.

Recently the ESD Alliance organized a webinar on Understanding Export Regulations Affecting the Electronic System Design Ecosystem. This was presented by Larry Disenhof who is both the chair of the ESD Alliance Export Committee and is a l...

What an unbelievable 5-day at the Grace Hopper Celebration! I am proud to work for a company that is truly committed to fostering a culture of diversity and inclusion, giving employees professional development opportunities to succeed in their caree...