Simulation is a huge topic. Performance, debug, mixed-signal, low-power, assertions, coverage, IEEE languages, lint checking, interfaces, and much more. Many of us started using simulation when it was gates and waveforms while others joined in the era of complex, multi-language, testbench-driven simulation. Regardless, the pace of design and verification is accellerating for all of us. So how can we get those pearls of simulator wisdom that let us work our verification magic?
Team genIES is the answer. We have assembled the greatest set of simulation minds in EDA ready to provide technical tips, insights, suggestions, and recommendations that you can use to work your verification magic. Our first topic -- Enabling OVM Transaction Debug in SimVision without Code Changes -- is now up in this blog. We have a long list of additional topics throughout the simulation space.
So what's on you mind? How can I show a new test matches a golden test at the transaction level? How do I know my simulation is running as fast as it can? Under what conditions should I use DPI, VPI, PLI, VHPI, etc.? Just email us at genIES@cadence.com and we'll provide the tricks that will make you the magician!