As consumers we are very familiar with product
miniaturization trends. We demand more functionality in smaller sizes that have
longer battery life all the time. The electronics market has been delivering to
those customer expectations not just in consumer electronics marketplace, but
in all market segments.
Over the years, miniaturization has taken various
design and implementation approaches. One
of the ways designers reduced their product size was to use build-up
technology using high-density interconnect (HDI) and micro-vias. With shrinking
pin pitches on BGA, more designers were forced to use HDI and micro-vias.
A new trend of embedding packaged components on inner
layers of PCB and IC packages has emerged in the past 18-24 months. In the
past, embedded packaged component technology remained elusive for the broader
market due to lack of proper design tools and/or high cost of embedding
components on inner layers. Many more companies worldwide now have development
projects, prototypes or first series of products with embedded components that
are produced by multiple manufacturing companies.
There are two distinct manufacturing approaches used
to embed packaged components on inner layers of a PCB and IC packages – direct
attach and indirect attach. The direct attach method has been in production for a
while and many companies have been using it for prototypes to test out the challenges
and benefits of embedded packaged components. The indirect attach method is a newer
approach that provides some additional benefits over direct attach, but has its
own design challenges.
The new Allegro 16.5 release supports both direct and indirect
attach methods for embedding packaged components. While many PCB designers
initially want to embed passive components, Allegro allows users to embed
active components as well. It allows designers to control which components
should be embedded (cost, size and performance trade-offs) and which shouldn’t
be. This enables the PCB implementation design phase to flag any violations as
With both direct and indirect attach methods, there
are a set of manufacturing rules that influence the design process. Allegro
16.5 allows users to specify these rules and enables a constraint-driven PCB
design flow for embedded components and associated cavities. These rules include clearances between
components that are embedded, the specification of components that can be
embedded, and the layers that are chosen for embedding through the layer stack-up editor
as well as rules for managing cavities.
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Thank you for sharing.