PCB Design Blogs

Pin delays are used to specify the time delay or length from the internal package connection to the pin’s mounting layer. It is critical to include pin delays when tuning high-speed nets to ensure signal performance. Pin delays are used in the ...

The add-on model is applicable everywhere! You can choose a basic version of the car and add-on products make it faster, nicer, or more special. Air travel add-on includes seat reservation, food, priority check-in, and extra baggage. When you purchas...

After a quick overview of Allegro® System Capture , let’s start at the very beginning of the design process. Where are the parts? What parts can you use when creating an Allegro System Capture logical design? Parts, as you know, are the basi...

Many times, you would have required to create a standard pulse waveform that can be used for testing devices as per the industry standard. One good example is to simulate the ISO 7637-2 transient at the schematic design stage. This practice ensures t...

Design rules checks (DRC) determines whether your layout design complies with design constraints and highlights any violations. Performing DRC is an essential step of PCB development signoff before you generate manufacturing files. With increasing mi...

A design starts in the mind of an architect, gets drawn on whiteboards as basic block diagrams that describe a system. Next, designers see what can be reused from older designs, schematics get drawn, parts are identified, from in-house libraries or from online vendors. If the available parts don’t match their requirement, librarians are asked to create or modify parts. Then checks and rules are run to ensure design integrity...

Design companies often work with multiple PCB fabricators and each fabricator may have a different set of DFM rules. It is a customary practice followed by design companies to create a common denominator rule set that can be applied to all fabricator...

After completing a circuit, it’s time to run simulations. The first step is to define a simulation profile. A simulation profile controls which analysis is run and what resources are to be used, for example, the models which define the parts fo...

In this blog, you will be taking an IC package design from Allegro® Package Designer Plus (APD Plus) and export the design to Sigrity XtractIM . You will use XtractIM to extract models from the exported package and to assess the electrical pe...

Markets today are being driven by miniaturization. As the size is decreasing, PCB designs are getting more and more complex. Manufacturing boards while also addressing the signal integrity issues is becoming a challenge. With continuous shrinkage in the pin ...

This year, it’s the new Fast shape mode, and I feel like I need to talk about it because it is a game-changer in working with positive shapes when it comes to performance and the display quality of shapes. The more etch shapes you have or the larger the database with positive shapes, the slower...

What if you need a model with specific parameters, generated for your schematic on the fly? What if you need a model that is created by adding few parameters from a data sheet? What if you want to see the changes in the model behavior by varying a c...

OrbitIO System Planner is a multi-fabric interconnect planning and optimization solution. It provides a single-canvas environment where you can derive and evaluate connectivity between the dies and package in the context of the complete system....

An increase in design complexity has forced designers to take novel approaches to meet routing challenges. Long back, designers used to group objects (vias, clines, or shapes) and copy-paste them in the design to reuse routing. The obvious drawback w...

The HotFix 013 (QIR 2, indicated as 2021 in the application splash screens) update for OrCAD® and Allegro® is now available at Cadence Downloads . This blog post contains important links for accessing this update and introduces some of the mai...

And what a year it has been! Like many of you, we've worked from home. We juggled house and office work, washed our hands innumerable times a day, rinsed every grape before putting it in the fridge, and scrambled to look presentable in conference...

When you are designing a schematic, you want to focus on the accuracy and performance of the circuit, and not spend time looking for and comparing various components on vendor websites. The integrated part search and placement feature in the OrCAD&re...

In one of the previous posts, we learnt about How to Run a RAVEL Rule from the GUI . The RAVEL rules that you write can be run from command line or Graphical User Interface (GUI) of Allegro® PCB Editor. You can also run these rules from Allegro&re...

Legacy material editors supported different file formats leading to inconsistencies across PCB and package substrate design applications. This drawback due to inconsistency is now overcome by the new Material Editor that uses a ...

In addition to reducing package creation time by 60-80%, Cadence Allegro ECAD-MCAD Library Creator has the Library Creator repository, which provides thousands of ready-to-use packages and templates. The repository allows centralized configuration-controlled storage...

It might seem simple, but database units and accuracy directly relate to the artwork generated, and it is possible to misunderstand the artwork format as it relates to the board setup. Thirty years ago, databases were set up as Mils (0.0) or Mil...

PSpice® A/D is a fully featured analog and mixed-signal simulator that can be integrated with OrCAD® and Allegro® tools. With PSpice A/D you can improve design functionality and reliability, and also verify the electrical performance of d...

Allegro® RF PCB solution provides you with a unified design solution for complex mixed-signal projects. From schematic to layout and manufacturing, a total front-to-back design flow helps you streamline your entire RF design process. You lay RF ...

Reflections happen on Printed Circuit Boards (PCBs) whenever signals encounter an impedance discontinuity, so maintaining constant impedance along all interconnects is always desirable. But it’s not always possible to achieve this. In order to ...

Often organizations do not grant administrative privileges to users on their systems. Performing administrative tasks by standard users can be of greater risk than benefit as this could lead to serious virus and malware infections and catastrophic da...