PCB Design Blogs

A guest blog to take your focus away from normal news and feature information that you are accustomed to reading about in the world of PCB Design blogs to let you know about Cadence’s recent ventures into the world of Computational Fluid Dynamics.

I came across a question on a social media site about how to know when the absolute maximum ratings for a component have been exceeded? In other words, how do you identify components that are stressed due to power dissipation, increase in junction te...

As a developer, you would have often used regular expressions, (\.[a-zA-Z]{2,3}), in your code to search, extract, or replace words in a string. Whether it is C++, Java, or Python, you can use regex in every programing language to match any characte...

When designing a PCB layout, all the constraints and design rules must be followed to avoid design issues and ensure that the board works as intended. Constraints are rules that you apply to different objects in your design, nets, and XNets to ensur...

So, if you are an electronics design program manager or team manager, it’s unlikely that you work directly with any design tools, such as System Capture. However, you might still want quick access to ECAD data, including project lists, Live BOM...

Cadence OrCAD and Allegro 17.4-2019 Hotfix 019 was rolled out in mid-July and is now available for download. In this update, we bring to you many new and enhanced features across multiple technological areas, fixes for customer-reported bugs, ...

When time and quality are at a premium and you are in a hurry to meet a tight schedule, access to 5000 tried and tested TI-PSpice models across 100 categories, not to mention the 4000 test circuits, definitely gives you the edge you needed. You can q...

Picking up from where we left off in the previous post , let’s look at some more new and interesting changes made in Hotfix 019. As you might already know, Allegro® System Capture is available both for designers who work alone, in small tea...

“The only constant in life is change” nowhere is this adage truer than in the world of software. Updates, releases, patches … They are a part of our lives as experts work behind the scenes to constantly improve and fine-tune what w...

Boards and Packages are getting extremely complex and large; what used to be considered large with millions of objects is now close to 100s of millions of objects. Traditional rendering on CPU of such large and complex designs is not scalable for tod...

The Download Manager user interface has been revamped in 17.4-2019 HotFix 019. Various new features are integrated to enhance user experience and efficiency. The latest release of Download Manager delivers modern UI architecture with a scope for future enhancements...

The HotFix 019 (QIR 3, indicated as 2021.1 in the application splash screens) update for Release 17.4-2019 of OrCAD and Allegro products is now available at Cadence Downloads. This blog post contains important links for accessing this update and introduces s...

IPC-2581 ensures efficient PCB design data transfer and brings advanced capabilities to extract all the required data for manufacturing and assembly. This includes netlist, test pad information, artwork, drill data, bill of materials, test files, and design variants. While exporting data, you can choose to suppress any information which is not needed for fabrication, assembly, testing, or procurement

This post is for those of you who have been creating logical designs and boards for a while. In most cases, a new product or design doesn’t require every component or module to be made from scratch. Most standard components are reused and, at t...

In our previous blog post, we discussed how to count the number of pins and rename reference designators using the SKILL codes available in the Allegro SKILL Code Library . In this blog post, let’s focus on how to create a stack and define globa...

PCB design complexities increase with the increase in the number of parts and layers in a design. For creating these complex designs with maximum efficiency, the design tool should be equipped with advanced features and functionalities. In the desig...

The tolerances are not unique to only PSpice or simulators, they are part of any problem requiring numerical methods of solutions involving reiterative steps that finally converge. For example, many data analysis applications will require ABSTOL and RELTOL. Let us then first try to understand what these tolerances exactly...

In part 1 of this blog post, we covered the model-less aspect of Allegro® System Capture’s Design Integrity solution and now here we are with part 2. So, maybe scrolling through or navigating 200-300 pages of a design to catch logic design ...

Almost every PCB design includes different types of shapes, mainly for ground and power connections. Shapes in a PCB usually represent copper areas. When designing a PCB, you might want to create a square at the board edge which is an exposed copper ...

While translating boards from different PCB design applications or changing design units in the later phase of a design cycle, a wide variety of mathematical round-offs may occur for geometric computations. As DRCs are logically computed, the DRCs cr...

Component heating, Joule heating, heat sinks…does the very idea of checking the stress of hundreds of devices on a board for various operating conditions make you reach for a cup of coffee? Is a ¼ Watt resistor dissipating 1/3 Watts? D...

A footprint is a graphical representation composed of pads used for connecting electronic devices to a PCB. Any error while creating a footprint can cause redesigning of the whole board. Therefore, creating the right footprint is important to the des...

Some people say that finding the right components for a design is the most time-consuming part of designing. If that is correct, you need all the help you can get to quickly locate what you need. You might need a specific type of component, a specifi...

As a designer, your requirement at the early stages of schematic design is quite different, that is the part information you need when it comes to implementing the schematic design and while simulating it for testing and analysis is different i...

Pin delays are used to specify the time delay or length from the internal package connection to the pin’s mounting layer. It is critical to include pin delays when tuning high-speed nets to ensure signal performance. Pin delays are used in the ...