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Verification

Why LLMs Are the Best Thing to Happen to Chip Design

By Kartik Hegde, Sr. Engineering Group Director We live in a world increasingly…

Corporate
• 7 min read
featured , chip design , AGI , LLMs

Corporate News

Trusted Autonomy with Cadence Super Agents & NVIDIA Open Agent Safety Platform

Cadence AI Super Agents bring engineering trusted autonomy to semiconductor workflows…

Corporate
• 8 min read
featured , agentic ai , autonomy , NVIDIA , Super Agent

Corporate News

15 Years of Trust: Honda, Cadence, and the Future of CFD

What does it take to transform promising research into simulation technology that…

Corporate
• 3 min read
CFD , featured , Cascade Technologies , Aerodynamics , Honda

Data Center

Cadence at Yotta 2026: From Infrastructure Investment to AI Value

The AI industry has entered a new phase. The conversation is no longer all about…

Corporate
• 4 min read
featured , AI Factories , digital twin , Reality Digital Twin
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Blog - Post List
Latest blogs

Verification

Why LLMs Are the Best Thing to Happen to Chip Design

By Kartik Hegde, Sr. Engineering Group Director We live in a world increasingly…

• 7 min read
featured , chip design , AGI , LLMs

Analog/Custom Design

From Waveform to Root Cause: Debugging Mixed-Signal Designs with SimVision MS

Learn how SimVision MS connects waveforms, mixed nets, connect modules, schematic…

• 6 min read
AMS , mixed signal design , AMS Designer , Mixed-Signal , SimVision-MS , AMS Verification

Physical Systems Simulation (CAE)

Cadence BETA CAE Announces the Release of 2025.2.3 Version of its Software Suite

About this Release We officially announce the third hot fix release of 2025.2 for…

• 5 min read
CFD , Automotive , physical systems simulation , KOVMOS , SPDRM , FATIQ , Beta CAE , ANSA , NVH , CAE , CAE Software , meta , multiphysics

Analog/Custom Design

Fix It Faster: The Secret Virtuoso Tool You're Not Using

Virtuoso suddenly slows down. Do you restart, call IT, or keep guessing? Before you…

• 4 min read
IC26.1 , diagnostic center , Layout , Virtuoso , analog design , health Monitor , Custom IC , Virtuoso Layout Suite XL

Life at Cadence

What It’s Really Like to Be an Intern at Cadence

At Cadence, internship opportunities give students the chance to do more than observe…

• 4 min read
Careers , life at cadence , internship

カスタムIC／ミックスシグナル

Virtuoso Studio：Sパラメータデータから実用的な知見を引き出す

Virtuoso Visualization and Analysis XLのS-Parameterアシスタントは、Touchstoneファイルを読み込み、Sパラメータや主要な電気特性を自動で可視化します…

• less than a min read
S-parameter Analysis , S-parameter , ViVa-XL , Virtuoso Studio , ADE Explorer , Virtuoso Visualization and Analysis XL , virtuoso visualization and analysis , S-Parameter Quality Checking tool , Virtuoso Analog Design Environment , Spectre , ViVA , ADE Artist , japanese blog , Custom IC Design , ADE Assembler

Analog/Custom Design

Make the Right Layout Decisions Earlier

Explore how Virtuoso Design Planner brings hierarchy, connectivity, placement, and…

• 3 min read
Virtuoso Studio , Layout EXL , Mixed-Signal , Layout Suite , Virtuoso Analog Design Environment , Layout , Virtuoso , Design Planner , Virtuoso Layout Suite EXL , Virtuoso Layout Suite , Custom IC

Corporate News

Trusted Autonomy with Cadence Super Agents & NVIDIA Open Agent Safety Platform

Cadence AI Super Agents bring engineering trusted autonomy to semiconductor workflows…

• 8 min read
featured , agentic ai , autonomy , NVIDIA , Super Agent , NVIDIA Open Agent Safety Platform , AI/ML

Verification

GDDR7: Highlights of Memory of Choice for Graphics and High Bandwidth Apps

Graphics Double Data Rate 7 (GDDR7) Synchronous Graphics Random Access Memory (SGRAM…

• 5 min read
Verification IP , gddr6 , VIP , JEDEC , DFI , GDDR , DRAM , Graphics memory , memory models , GDDR7

Verification

The Ethernet PHY We Knew, The UALink PHY We Needed

Same building blocks. Same lane rates. So why not just use Ethernet PHY unchanged…

• 10 min read
Verification IP , physical layer , Ethernet , UALink , protocol verification

Analog/Custom Design

Earn, Validate, and Showcase Your IC Design and Verification Expertise

Turn technical learning into trusted, shareable recognition with Cadence training…

• 3 min read
Accelerated_Learning , Virtuoso Studio , EDA , training , webinar , digital badges , training bytes , Semiconductor , ask

Data Center

From Optional to Essential: DLB Uses Digital Twins to Engineer AI Data Centers

AI Is Changing the Rules of Data Center Design Artificial intelligence is reshaping…

• 3 min read
AI data center , data center , digital twin , Reality Digital Twin

Corporate News

15 Years of Trust: Honda, Cadence, and the Future of CFD

What does it take to transform promising research into simulation technology that…

• 3 min read
CFD , featured , Cascade Technologies , Aerodynamics , Honda

Cadence Japan

15年にわたる信頼：HondaとCadence、そしてCFDの未来

研究成果を、エンジニアが実際の開発で安心して使えるシミュレーション技術へと発展させるには、何が必要なのでしょうか？HondaとCadenceの一員であるCascade…

• less than a min read
CFD , Cascade , japanese blog

System, PCB, & Package Design 

BoardSurfers: Getting Started with SKILL in Allegro X: Testing SKILL Scripts

SKILL programming is one of the most powerful ways to extend and automate workflows…

• 5 min read
Skill programming , skill language , SKILL

Verification

Untangling PCIe L0p: How Four Bytes DLLP Reshape a Live Link

PCIe links in AI accelerators, storage subsystems, and data-centric platforms see…

• 5 min read
Verification IP , Low Power , Coverage-Driven Verification , PCIe

Artificial Intelligence (AI)

Autonomy Levels for Design Agents: L1 to L5 Explained

Agentic AI plays an important role in chip and system design, but not every “agentic…

• 8 min read
agentic ai , Design Agents , AI in chip design , AI Super Agents , AI

SoC and IP

Accelerating Physical AI Through Cadence Silicon Solutions and Arm Total Design

Physical AI is shifting artificial intelligence from centralized data centers into…

• 6 min read
IP , chiplets , physical ai , Arm CSA , ARM

Learning and Support

Your Verification Expertise Has Earned Recognition. Now Make It Visible!

Verification engineers spend years building expertise across multiple disciplines…

• 4 min read
digital badge , webinar , Cadence training
CDNS - Fix Layout Hompage