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Featured

Artificial Intelligence (AI)

fJscaler, GF, and Cadence Collaborate to Scale Optical Interconnects for AI

Unified EIC/PIC Co-Design and Strategic Foundry Collaboration Helps fJscaler Develop…

Corporate
Corporate 27 Oct 2026 • 8 min read
Cadence Oncloud , interconnects , featured , gf , GlobalFoundries

RF Engineering

Agentic AI for RF Design: A Practical Path to Faster Execution

How Cadence AI supports greater engineering productivity In RF design, the most useful…

StandingWaves
StandingWaves 27 Oct 2026 • 3 min read
featured , agentic ai , Virtuoso RF , RF design

Artificial Intelligence (AI)

What Can Agentic AI Super Agents Actually Do for Me?

As chip and system designs grow more complex, engineering teams face increasing pressure…

Reela Samuel
Reela Samuel 22 Oct 2026 • 9 min read
AuraStack AI Super Agent , featured , agentic ai , LLM , AI in chip design

Artificial Intelligence (AI)

Accelerating Digital Implementation and Signoff with InnoStack AI Super Agent

Modern SoC implementation involves more interdependent trade-offs than teams can…

Vinod Khera
Vinod Khera 21 Oct 2026 • 3 min read
featured , agentic ai , AI in chip design , InnoStack , Digital Implementation
cdns - all_blogs_categories

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Blog - Post List
Latest blogs

Verification

Pre-Silicon Edge AI Verification: Skymizer and Palladium Z3 System Studio

As large language model (LLM) inference expands beyond hyperscale data centers into…

HSV Marketing 28 Oct 2026 • 3 min read
hardware-software co-verification , EdgeAI , pre-silicon , Skymizer , Palladium , SystemStudio , EDA , Cade

Verification

Unraveling Streamlined Virtual Channel Extended Capability (SVC)

Introduction The Streamlined Virtual Channel Extended Capability (SVC) was introduced…

Igor Krause 27 Oct 2026 • 6 min read
Verification IP , System Design and Verification , VIP , PCIe , PCIe 6.0

SoC and IP

PCI Express Security and TEE Integration, Part 1 - Establishing Trust

Security Foundations for PCIe: Establishing Trust Beyond the CPU As AI infrastructure…

RajeshPamujula 27 Oct 2026 • 4 min read
controller IP , PHY IP , PCIe , TEE , PCI Express

Artificial Intelligence (AI)

Who Signs the Tapeout? Ziyad Hanna on AI Chip Design – Wearing Flip-Flops

An AI agent writes the RTL, builds the testbench, runs the regressions, and closes…

Corporate 27 Oct 2026 • 2 min read
ChipStack , Wearing Flip-Flops , Ziyad Hanna , AI Super Agents , ChipStack AI Super Agent

Artificial Intelligence (AI)

fJscaler, GF, and Cadence Collaborate to Scale Optical Interconnects for AI

Unified EIC/PIC Co-Design and Strategic Foundry Collaboration Helps fJscaler Develop…

Corporate 27 Oct 2026 • 8 min read
Cadence Oncloud , interconnects , featured , gf , GlobalFoundries , AI

RF Engineering

Agentic AI for RF Design: A Practical Path to Faster Execution

How Cadence AI supports greater engineering productivity In RF design, the most useful…

StandingWaves 27 Oct 2026 • 3 min read
featured , agentic ai , Virtuoso RF , RF design

Physical Systems Simulation (CAE)

Why Every Modern Vehicle Is Becoming a Software Problem

For more than a century, automotive innovation was measured in horsepower, fuel efficiency…

PMM Michael 27 Oct 2026 • 4 min read
autonomous driving , Software-Defined Vehicle , Automotive Software , Virtual Testing , ADAS , VTD , Automotive Simulation

Verification

From UPLI Poison to TL Message Type 0x20: Carrying Corrupted Data Through UALink

The Problem Nobody Wants to Talk About Every high-speed link has a quiet fear:…

Nikshit 27 Oct 2026 • 10 min read

Physical Systems Simulation (CAE)

Romax 2026.2: A First Look at the Next Chapter in Drivetrain Simulation

Larger Models. Faster Insight. More Confident Decisions. Engineering teams are being…

Pankaj Pawar 27 Oct 2026 • 1 min read
Drivetrain NVH , Transmission design , AI in Gearbox design , Gearbox nvh , webinar , Drivetrain , Romax , Gears , simulation , Machine Learning for Gearbox , blog

Computational Fluid Dynamics

Generating High-Quality Data for Turbomachinery Machine Learning

Inverse design and high-fidelity CFD enable ML predictors that accelerate optimization…

Veena Parthan 26 Oct 2026 • 6 min read
CFD , TurboDesign , turbomachinery , Advanced Design Technology , Response surface optimization , machine learning , Fidelity CFD , Fidelity Turbo

Verification

From Transactions to Flits: The Journey Through UALink Transaction Layer

AI accelerators are getting faster, but their performance increasingly depends on…

Nirav Toliya 26 Oct 2026 • 4 min read
Function Verification , Flow Control , UALink VIP , Transaction layer , Flit Packing

PCB、IC封装:设计与仿真分析

在云中运行 Clarity 3D Solver,对复杂系统进行电磁分析

核心结论:Cadence Clarity 3D Solver Cloud 通过与 Amazon Web Services(AWS)的安全连接,将 3D 有限元法…

SDA China 22 Oct 2026 • 1 min read
自适应网格细化 , Chinese blog , Clarity 3D Solver Cloud , 电磁分析 , 中文 , Clarity 3D Solver , 3D 全波电磁求解器 , 有限元法

System, PCB, & Package Design 

Cadence OrCAD X and Allegro X 26.1 Is Now Available

The Cadence OrCAD X and Allegro X 26.1 release is now available from Cadence Downloads…

AllegroReleaseTeam 22 Oct 2026 • 2 min read
System Capture , 26.1 , OrCAD X Capture , Sigrity X , Allegro X PCB Editor , Topology Workbench , Allegro X Advanced Package Designer , Allegro X Design Platform , Aurora , PCB design , OrCAD X Presto , OrCAD X , Pulse , allegro x

Artificial Intelligence (AI)

What Can Agentic AI Super Agents Actually Do for Me?

As chip and system designs grow more complex, engineering teams face increasing pressure…

Reela Samuel 22 Oct 2026 • 9 min read
AuraStack AI Super Agent , featured , agentic ai , LLM , AI in chip design , InnoStack , ChipStack AI Super Agent , ai in eda , AI/ML , Super Agents , ViraStack

SoC and IP

Data Movement Enabling Physical AI

Most discussions around physical AI center on the models and compute that enable…

Ray Davtyan 22 Oct 2026 • 10 min read
Design IP , IP , PCIe Gen4 , PHY , 25G Ethernet , Ethernet standards , USB , SoC , ip cores , semiconductor IP , SerDes , PCI Express

Physical Systems Simulation (CAE)

ODYSSEE Solver 2026.2 Expands Predictive Modeling and AI Performance

Engineering organizations are generating more data than ever before. Simulation results…

PMM Michael 22 Oct 2026 • 3 min read
WhatsNew , AI for Engineering , Predictive Modeling , ODYSSEE Solver , machine learning , Data Analytics , design optimization , Data Mining

Artificial Intelligence (AI)

Accelerating Digital Implementation and Signoff with InnoStack AI Super Agent

Modern SoC implementation involves more interdependent trade-offs than teams can…

Vinod Khera 21 Oct 2026 • 3 min read
featured , agentic ai , AI in chip design , InnoStack , Digital Implementation , AI Super Agents , ai in eda , signoff , AI

PCB、IC封装:设计与仿真分析

Fidelity Pointwise 嵌套网格单元修复技术解析:提升 CFD 仿真精度与网格装配效率

在计算流体力学(CFD)仿真领域,嵌套网格因能够高效处理运动部件、复杂几何以及多区域耦合问题,已广泛应用于涡轮机械、航空航天、旋转设备和流体动力学分析等场景。然而…

SDA China 21 Oct 2026 • less than a min read
CFD仿真 , Chinese blog , 计算流体力学 , 涡轮机械分析 , 嵌套网格 , 网格单元修复 , 中文 , 网格优化

SoC and IP

How a Multi-Protocol PHY Simplifies Physical AI Connectivity

Physical AI systems must move large amounts of data across two very different connectivity…

Joe C 21 Oct 2026 • 4 min read
Design IP , physical ai , PHY , AI Inferencing , 25G Ethernet , 10G-KR , PCIe 5.0 , Ethernet , SerDes , SerDes IP , PCI Express , multi-protocol
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