Cadence Blogs

With the roads flooded with electric vehicles worldwide, it is on us to give EV batteries a second life, which would count as an effort to reduce e-waste and achieve the net zero emission targets set by policymakers.

Raspberry Pi are known for providing lost-cost computing around the world. Their computers have been used by schools, small businesses, and even government call centers. One of their missions is to educate children about computers and to help them re...

Today is a very significant anniversary for the whole of the human race. But if you are reading Breakfast Bytes, it is especially important for whatever you do. Today is the 75th anniversary of the invention of the transistor. There is actually no p...

Test points are placed on a PCB during the design process to ensure (some might say ‘test’) that the design performs as intended and provides the desired output. Test points also help ensure that the integrity of the component assembly pr...

人工智慧、HPC等應用如雨後春筍般出現，晶片尺寸與規模越來越大、設計規範亦越來越複雜，因應系統及全晶片層級的設計挑戰，Cadence解決方案也顯現高度整合與智慧化的發展趨勢，針對設計到簽核收斂的完整設計工具與整合流程，進一步推出業界首創的全晶片同步優化簽核 - Certus設計收斂方案。 擘劃並引領Cadence數位與簽核事業群的研發方向、目前擔任Cadence資深副總裁暨數位與簽核事業群總經理的滕晉慶(Chin-Chi Teng)博士，日前來台與台灣媒體共同探討Cadence最新數位設計趨勢、...

Cadence and our employees were proud to show appreciation for our Veteran employees, their families, and all who have served the United States this Veterans Day. Honoring our military's personnel, Cadence observed Veterans Day as a holiday in the U.S...

Hi, I’m Samuel Afari and I’m a CFD Applications Engineering Intern at Cadence. I am currently a PhD candidate at Embry-Riddle Aeronautical University in Daytona Beach, Florida. I also did my MSc in Aerospace Engineering at the same school...

One of the effects of adopting a High Level Synthesis design methodology is that the barrier between "Systems designers" and "Hardware designers" is substantially reduced if not totally eliminated. Suddenly, both "Systems designers" and "Hardware de...

Today is the last day in November, amazingly, and since I was on vacation last Friday, today is my regular monthly update covering topics that don't justify a whole post on their own or that are updates to a previously published post. Kaufman Din...

聯電射頻晶圓設計套件(RF FDK)和Cadence RF方案協助其共同客戶 - 聚睿電子達成卓越 5G 射頻設計成果 Cadence與聯電宣布雙方合作經認證的毫米波參考流程，成功協助亞洲射頻IP設計的領導廠商聚睿電子(Gear Radio Electronics)，在聯電28HPC+ 製程技術以及Cadence® 射頻(RF)解決方案的架構下，達成低噪音放大器 (LNA) IC一次完成矽晶設計(first-pass silicon success) 的非凡成果。 經驗證的聯電28HP...

Smart manufacturing – the use of nascent technology within the industrial Internet of things (IIoT) to address traditional manufacturing challenges – is leading a supply chain revolution, resulting in smart, connected, and intelligent env...

Join Cadence Training and Principal Application Engineer Daniel Bayer for this free technical training webinar.

The Verisium Debug Platform is optimized for scalability, supporting debugging of simulation runs and emulation, where support for loading large source files and handling huge amounts of probe data is a must.

In this Training Webinar, you’ll learn how to automate your debug experience using the Verisium Debug…

I’m back again, it has been a while, but guess what… I have a lot of goodies to share with you. Since last time I posted a blog, our Virtuoso System Design solutions have gone through a lot of enhancements, and more automations have been accomplished. You may already have read our blog, Virtuoso Meets Maxwell: Getting Your Existing SiP File Into Virtuoso RF Solution, which covers how you can bring your existing SiP design…

Join us for a CadenceTECHTALK (aka webinar) to learn how the upcoming release of Fidelity CFD software significantly extends the capabilities of our pre-processing and unstructured meshing solutions. We'll demonstrate: Better performance for lar...

【技術講堂影片回顧】為取得競爭激烈的5G/無線市場先機，RF技術成為兵家必爭之地，為協助客戶實現完整且全面的RF工作流程解決方案，Cadence打造RF工作流程創新，導入RF整合為工程團隊提升生產力。 本次線上研討會影片回顧，將帶您一窺Cadence Clarity 3D 求解器(Solver) 和Celsius 熱求解器(Thermal Solver) 無縫整合導入Cadence AWR環境平台，透過內建的電磁與熱分析，不受限制的直接從內部解決大規模且複雜的RF系統，幫助客戶減少周...

Read this blog for getting an overview of post-layout circuit simulation & GDSII generation.

Unstructured meshing can automate much of the mesh generation process, saving significant engineering time and cost. However, controlling numerical errors resulting from the discrete mesh requires adaptation to the developing solution. Join this webinar to learn how Cadence CFD Adaptive Grid Generation methods use a continuous-size field that gets updated as the solution progresses. As a result, adherence to the underlying…

The world around us has become data-centric; everything needs data, from navigation maps in vehicles to medical chatbots to autonomous cars. We are using data to solve complex problems and decision-making. The beauty is more data leads to better per...

Learn how the Voltus-Sigrity X integrated solution can help you achieve faster system-level power integrity analysis and closure.

A core part of what we do at Cadence comes from an inescapable truth: designing and fabricating a silicon chip is an increasingly complex, time-consuming, and therefore expensive process. At every step of that process there are decisions to be made....

The Team RF "μWaveRiders" ブログシリーズはCadence AWR RF製品のためのショーケースです。月ごとの話題は、Cadence AWR Design Environmentのリリースのハイライト、機能ビデオとスポットライト、ソフトウェアのヒント、コツ、カスタマイズによって異なります。 最新のμWaveRidersのブログ投稿についてのメール通知を受け取りたい方はSubscribe をして下さい。 AWR Design Env...

High-end SOC architectures today requiring more area and higher speed to transfer and process data. To fulfill this requirement, protocol such as PCIe, USB, DP, SATA and USB4 are regularly being updated. Most critical part of the high-speed interface is the Physical (PHY) layer of the protocol where the actual signaling happens. In addition to signaling, the PHY also takes care of some of the processing to reduce errors…

AWR V22.1 software introduces the Pointer-Hybrid optimization method which uses a combination of optimization methods, switching back and forth between methods to efficiently find the lowest optimization error function cost. The optimization algorithm automatically determines when to switch to a different optimization method, making this a superior method over manual selection of algorithms. This method is particularly…

https://youtu.be/gLQbSlICCaE Made in Munich Englischergarten (camera Carey) Monday: Tensilica for Automotive Radar Tuesday: Passage: Wafer-Scale Programmable Photonic Communication Wednesday: Software 2.0 Thursday: Offtopic: Old Programming Languages...

The Allegro Package Designer Plus course provides all the essential training required to start working with Allegro® Package Designer Plus. The course covers all the design tasks, including importing IC data, BGA generation and connectivity gener...