Cadence Community

BoardSurfers: PCB Electronics - Defining and Applying Physical and Spacing Constraints

By mrigashira | 17 Sep 2019

If you get frequent calls from your fab houses or your customers regarding your product, or if your schematic, layout, and packaging engineers spend a lot of time exchanging notes about their requirements not being met, resulting in back and forth of designs, or if you believe, like most of us do, that...

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APD | PCB Editor | Constraint Manager
Upcoming Webinar: AI Accelerator Design with Stratus HLS

By dpursley | 17 Sep 2019

There is no doubt that 2019 has seen an explosion of artificial intelligence/machine learning usage for Stratus HLS. In fact, this momentum started in 2017. Noting the increase in machine learning applications in our user base, we researched how to efficiently move from a TensorFlow model to hardware...

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High-Level Synthesis | webinars | TensorFlow | machine learning | Stratus | SystemC | HLS
PCIe Gen 4: It's Official, We're Compliant

By Paul McLellan | 17 Sep 2019

Way back in April 2016, I wrote a post about Cadence IP for PCI Express (PCIe) Gen4 where we demonstrated compliance with Mellanox (now part of NVIDIA). As Mellanox's Gilad Shainer said to me when I talked to him back then: interoperability...

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PCIe 4 | PCIe Gen4 | pcie 3
IC Packagers: Capture Your Design for Review

By Tyler | 17 Sep 2019

How do you quickly show another developer an issue that concerns you? Do you need to send them the entire design, start a screen sharing session, or bring up the Symphony server and allow them to connect? All of these are GREAT review mechanisms; however, they aren’t always viable or convenient.

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APD | SiP Layout
Academic Network Engaging with National Taiwan University

By Tracy Zhu | 16 Sep 2019

The National Taiwan University hosted an EDA summer camp for the third consecutive year! Since “EDA" is an unfamiliar concept for many students, the  Graduate Institute of Electronics Engineering National Taiwan University (NTU GIEE) and&nb...

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university | Student Day | Taiwan | Cadence Academic Network | academia | university program