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Artificial Intelligence (AI)

fJscaler, GF, and Cadence Collaborate to Scale Optical Interconnects for AI

Unified EIC/PIC Co-Design and Strategic Foundry Collaboration Helps fJscaler Develop…

Corporate
• 8 min read
Cadence Oncloud , interconnects , featured , gf , GlobalFoundries

RF Engineering

Agentic AI for RF Design: A Practical Path to Faster Execution

How Cadence AI supports greater engineering productivity In RF design, the most useful…

StandingWaves
• 3 min read
featured , agentic ai , Virtuoso RF , RF design

Artificial Intelligence (AI)

What Can Agentic AI Super Agents Actually Do for Me?

As chip and system designs grow more complex, engineering teams face increasing pressure…

Reela Samuel
• 9 min read
AuraStack AI Super Agent , featured , agentic ai , LLM , AI in chip design

Artificial Intelligence (AI)

Accelerating Digital Implementation and Signoff with InnoStack AI Super Agent

Modern SoC implementation involves more interdependent trade-offs than teams can…

Vinod Khera
• 3 min read
featured , agentic ai , AI in chip design , InnoStack , Digital Implementation
cdns - all_blogs_categories

Blog - Post List
Latest blogs

Physical Systems Simulation (CAE)

Why Testing Automated Driving Is Harder Than It Looks

Most people assume the hardest part of automated driving is building the technology…

• 5 min read
autonomous driving , Scenario-Based Testing , Automotive Software , Virtual Testing , ADAS , VTD , Automotive Simulation

Corporate News

Cadence Expands Sovereign AI in Europe: From Chips to AI Factories

European engineering teams are advancing increasingly complex chip and system design…

• 5 min read
NVIDIA , data center , Millennium M2000 , Cadence Reality Digital Twin Platform , Sovereign AI

SoC and IP

PCI Express Security and TEE Integration, Part 2 - Protecting PCIe Traffic

Protecting PCIe Traffic: Understanding Link IDE and Selective IDE Part 1 of this…

• 6 min read
security , PCIe , TEE , IDE

Learning and Support

Accelerating RTL Development with the Cadence RTL Generation Agent

Digital design teams face increasing pressure to deliver production-quality RTL faster…

• 2 min read
digital badge , RTL , webinar , learning and support

SoC and IP

The Memory Challenge of Physical AI

Most AI hardware conversations start with compute, which is understandable since…

• 6 min read
Design IP , IP , Memory , gddr6 , PHY , memory technology , LPDDR PHY IP , GDDR , memory IP , LPDDR Controller IP , lpddr5x , Lpddr6 , GDDR7

System, PCB, & Package Design 

EuMW2026: Cadence Debuts GPU-Accelerated Clarity 3D Solver Solution

AI-enhanced Cadence technologies excited attendees at European Microwave Week 2026…

• 1 min read
Celsius Thermal Solver , Sigrity X , awr , Virtuoso , Clarity 3D Solver , millennium , allegro x

Artificial Intelligence (AI)

Agentic AI for Design Verification and Debug

Each new generation in chip design makes chip verification more complex. Today, verification…

• 7 min read
agentic ai , debug , AI in chip design , ChipStack AI Super Agent , AI , verification

Data Center

L&T Achieves 2–10X Faster Data Center Design with Reality Digital Twin Platform

Every data center design starts with a deceptively simple question: will the facility…

• 8 min read
CFD , data center , Larsen & Toubro , Cadence Reality Digital Twin Platform , Cadence Reality DC Design

Verification

Pre-Silicon Edge AI Verification: Skymizer and Palladium Z3 System Studio

As large language model (LLM) inference expands beyond hyperscale data centers into…

• 3 min read
hardware-software co-verification , EdgeAI , pre-silicon , Skymizer , Palladium , SystemStudio , EDA , Cade

Verification

Unraveling Streamlined Virtual Channel Extended Capability (SVC)

Introduction The Streamlined Virtual Channel Extended Capability (SVC) was introduced…

• 6 min read
Verification IP , System Design and Verification , VIP , PCIe , PCIe 6.0

SoC and IP

PCI Express Security and TEE Integration, Part 1 - Establishing Trust

Security Foundations for PCIe: Establishing Trust Beyond the CPU As AI infrastructure…

• 4 min read
controller IP , PHY IP , PCIe , TEE , PCI Express

Artificial Intelligence (AI)

Who Signs the Tapeout? Ziyad Hanna on AI Chip Design – Wearing Flip-Flops

An AI agent writes the RTL, builds the testbench, runs the regressions, and closes…

• 2 min read
ChipStack , Wearing Flip-Flops , Ziyad Hanna , AI Super Agents , ChipStack AI Super Agent

Artificial Intelligence (AI)

fJscaler, GF, and Cadence Collaborate to Scale Optical Interconnects for AI

Unified EIC/PIC Co-Design and Strategic Foundry Collaboration Helps fJscaler Develop…

• 8 min read
Cadence Oncloud , interconnects , featured , gf , GlobalFoundries , AI

RF Engineering

Agentic AI for RF Design: A Practical Path to Faster Execution

How Cadence AI supports greater engineering productivity In RF design, the most useful…

• 3 min read
featured , agentic ai , Virtuoso RF , RF design

Physical Systems Simulation (CAE)

Why Every Modern Vehicle Is Becoming a Software Problem

For more than a century, automotive innovation was measured in horsepower, fuel efficiency…

• 4 min read
autonomous driving , Software-Defined Vehicle , Automotive Software , Virtual Testing , ADAS , VTD , Automotive Simulation

Verification

From UPLI Poison to TL Message Type 0x20: Carrying Corrupted Data Through UALink

The Problem Nobody Wants to Talk About Every high-speed link has a quiet fear:…

• 10 min read

Physical Systems Simulation (CAE)

Romax 2026.2: A First Look at the Next Chapter in Drivetrain Simulation

Larger Models. Faster Insight. More Confident Decisions. Engineering teams are being…

• 1 min read
Drivetrain NVH , Transmission design , AI in Gearbox design , Gearbox nvh , webinar , Drivetrain , Romax , Gears , simulation , Machine Learning for Gearbox , blog

Computational Fluid Dynamics

Generating High-Quality Data for Turbomachinery Machine Learning

Inverse design and high-fidelity CFD enable ML predictors that accelerate optimization…

• 6 min read
CFD , TurboDesign , turbomachinery , Advanced Design Technology , Response surface optimization , machine learning , Fidelity CFD , Fidelity Turbo

Verification

From Transactions to Flits: The Journey Through UALink Transaction Layer

AI accelerators are getting faster, but their performance increasingly depends on…

• 4 min read
Function Verification , Flow Control , UALink VIP , Transaction layer , Flit Packing
CDNS - Fix Layout Hompage