Cadence Blogs

图文详解：如何在PowerSI中为封装体上添加假性球体和参考层？

By Sigrity | 13 Dec 2019

本文由Cadence经销商之一的北京耀华创芯电子科技有限公司整理撰写。耀创科技专注于电子设计自动化（EDA）服务，在引进国外先进EDA工具的同时，针对中国市场特殊性，与Cadence公司合作，在国内最早提出了电子设计与数据管理平台概念，开发出具有自主知识产权的电子电气设计集成数据管理平台，极大加速了板级产品的标准化设计流程，覆盖从优选元件选控、协同设计输入、在线检查分析、标准化文档输出及PLM/PDM系统集成，获得业界一致好评。同时提供除软件使用培训之外的项目陪同设计服务，“与客户共...

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SI | Chinese blog | 中文 | Sigrity | IC封装 | S参数 | PowerSI
Known Good Die

By Paul McLellan | 13 Dec 2019

Do you know what known good die are? Do you know what wafer sort is? Final test? Wafer Sort After a wafer has been manufactured in the fab, it usually (but not always) goes through wafer sort. This uses a special tester to move across the w...

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system-in-package | kgd | 3DIC | known good die
Brian Kernighan's Memoirs

By Paul McLellan | 12 Dec 2019

If you have ever worked on placement or floorplanning, and probably some other areas of EDA, then you will have heard of "Kernighan and Lin". It's a partitioning algorithm. You might not even have realized that the Kernighan of Kernigh...

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Quickly View Schematic Designs, Boards, and IC Packages for Free Using Cadence PCB Design Viewers 2019

By AllegroReleaseTeam | 11 Dec 2019

Quickly view a schematic, layout, or IC package without installing the complete OrCAD product suite. Get free, read-only access to design data created in OrCAD Capture, PCB Editor, orAllegro Package Designer+ (APD+). Perhaps you hav...

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OrCAD Capture | APD | PCB Editor | PCB design and layout | 17.4-2019
System in Package, Why Now? Part 2

By Paul McLellan | 11 Dec 2019

This post is a continuation of last week's post Multiple Die in Packages. Why Now? That post looked at several of the drivers for system integration increasingly being done using 3D packaging technologies rather than integrating everything o...

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3DIC | more than Moore | moore's law
Virtuoso IC6.1.8 ISR8 and ICADVM18.1 ISR8 Now Available

By Virtuoso Release Team | 11 Dec 2019

The IC6.1.8 ISR8 and ICADVM18.1 ISR8 production releases are now available for download.

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Cadence blogs | ICADVM18.1 | ADE Explorer | IC Release Announcement blog | Virtuoso RF | Virtuoso Custom Placer | Electromagnetic analysis | Virtuoso | CLE | IC Release Blog | Custom IC Design | Virtuoso Layout Suite | IC6.1.8 | ADE Assembler | Virtuoso Layout Suite XL | clarity
IC Packagers: Copy and Paste Refresh in 17.4

By Tyler | 10 Dec 2019

The most common operations in any tool are probably adding, moving, deleting… plus copying and pasting. That we all are familiar with Control-C and Control-V being shortcuts to these actions speaks to their applicability across tools we use ev...

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allegro 17.4 | APD | Allegro Package Designer | Allegro
Cadence at CES 2020: Tensilica Everywhere

By Paul McLellan | 10 Dec 2019

Once again, Cadence will be at CES in Las Vegas. It takes place January 7 to 10, 2020, the start of a new decade. I wonder what electronic marvels we will see before 2030 rolls around. We will be in the south hall of the Las Vegas Convention Center ...

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CES | Tensilica
Virtuoso Meets Maxwell: Help with Electromagnetic Analysis - Part IV

By Kabir | 9 Dec 2019

This is the fourth blog in the multi-part series that aims at providing in-depth details of electromagnetic analysis in the Virtuoso RF solution. This part highlights how EM analysis in Virtuoso is compared with other third-party tools in terms of accuracy...

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AXIEM | SiP | ICADVM18.1 | Virtuoso Layout EXL | Virtuoso Meets Maxwell | Virtuoso RF | Package Design in Virtuoso | Electromagnetic analysis | RF design | method of moments | Finite Element Method | Layout Editing | Allegro | clarity
Xcelium Is 50% Faster on AWS's New Arm Server Chip

By Paul McLellan | 9 Dec 2019

At Re:invent, Amazon AWS announced Graviton 2, their second-generation Arm server chip. In the AWS news blog , written by Jeff Barr, AWS Chief Evangelist, he provides details. Today I would like to give you a sneak peek at the next generation of Arm...

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annapurna labs | nitro | cloud | aws | graviton 2 | cadence cloud | neoverse | ARM
Virtuosity: 针对高阶工艺节点器件级布线的工具— 干线-干线网状布线工具

By Parula | 8 Dec 2019

本博客强调了干线-干线网状布线功能的重要性，它不仅为定制器件级的布线提供了解决方法，还提高了版图设计师们的工作效率.

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trunk mesh routing | Trunk generation | Interactive Routing | Chinese blog | Pin to Trunk | Cadence blogs | structured routing | ICADVM18.1 | Virtuoso Space-based Router | mesh routing | Layout EXL | trunk-to-trunk mesh | Layout Suite | trunk creation | Generate Trunk | mixed signal | Finish Trunk | EM Trunk Optimization | Custom IC Design | Virtuoso Layout Suite | Custom IC
Cashing the PSS Promises

By Sharon | 8 Dec 2019

A little bit of everything in the blog today: PSS is All Over As someone that was involved with UVM and PSS, both becoming Accellera standards, it is exciting to see both growing independently and together. With PSS we had a massive amount of papers ...

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uvm | CDNLive | Acceleration | virtual prototypes | Perspec | perspec system verifier | Emulation | DVcon | Accellera | System Design & Verification | pss | portable stimulus | verification
Sunday Brunch Video for 8th December 2019

By Paul McLellan | 8 Dec 2019

https://youtu.be/3gP0Z02MVps Made at Salinas River State Park (camera Carey Guo) Monday: The Photonics Summit 2019: Hybrid Lasers Tuesday: Cadence to Acquire AWR Wednesday: "If You Can Get Your Ship into Orbit, You're Halfway to An...

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sunday brunch
System in Package, Why Now?

By Paul McLellan | 6 Dec 2019

At HOT CHIPS this summer, one of the things I noticed was just how many of the designs being presented were in some form of 3D packaging with multiple die. I wrote about many of them in my post HOT CHIPS: Chipletifying Designs . At last year's HOT.....

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chiplet | 3DIC | more than Moore | moore's law
Library Characterization Tidbits: Creating Statistical Libraries for Standard Cells and IO Cells

By Aravind R | 5 Dec 2019

Let’s read how you can use the Liberate Variety statistical characterization solution of the Cadence Liberate Characterization Portfolio for generating the statistical characterization models for standard cell libraries.

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local variation | statistical characterization | AOCV | characterization | liberate trio | mismatch analysis | Liberate Variety | Monte Carlo | standard cells | global variation | lvf | Liberate | Liberate Characterization Portfolio
Virtuosity: 针对高级工艺节点器件级布线的工具 – Generate Trunks

By Parula | 5 Dec 2019

Trunk Generation 创新功能，不仅实现干线自动化，提高生产效率，还提供完整的Pin to Trunk 流程的自定义选项.

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Trunk generation | Interactive Routing | Chinese blog | Pin to Trunk | Cadence blogs | ICADVM18.1 | Virtuoso Space-based Router | Layout EXL | Layout Suite | trunk creation | Virtuoso | Generate Trunk | EM Trunk Optimization | Custom IC Design | space based router | Virtuoso Layout Suite | Custom IC
Photonics Summit: Lumerical-Cadence Flow

By Paul McLellan | 5 Dec 2019

James Pond, the CTO of Lumerical, wrapped up the Photonics Summit recently. He started by giving an overview of the Lumerical-Cadence flow but the real focus of his short presentation was creating robust designs using photonics inverse design, or PID...

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curvycore | Lumerical | silicon photonics | Virtuoso | photonics
Virtuosity: 针对高阶工艺节点的器件级布线工具 — Finish Trunk

By Parula | 4 Dec 2019

本博客是该系列博客的第一篇，将介绍Finish Trunk 命令，如何实现器件级的布线需求，它并不算是新功能，但可被认为是又一突破性功能.

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Trunk Trimming | Chinese blog | Pin to Trunk | Create Wire | ICADVM18.1 | Virtuoso Space-based Router | layout XL | Layout Suite | Trunk Extending | Layout L | Finish Trunk | EM Trunk Optimization | Custom IC Design
"If You Can Get Your Ship into Orbit, You're Halfway to Anywhere"

By Paul McLellan | 4 Dec 2019

I planned on using the 50th anniversary of Apollo 12 as a hook for this blog, but as it happened I was sick that week, so never wrote it, and my post missed its "launch window". Apollo 12 was from November 14 to 24,1969. I wrote ...

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rocket equation | space travel
Search Faster and Smarter in Release 17.4-2019

By Rachna2018 | 3 Dec 2019

Allegro and OrCAD 17.4-2019 products come with the latest version of CDNSHelp. In this post, I will quickly share the changes made in this release, that will make things much simpler and before you realize it, your content searches will give you better...

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17.4 | Search | Cadence Help | 17.4-2019 | OrCAD | Allegro
IC Packagers: The Third Dimension of 17.4 IC Packaging

By Tyler | 3 Dec 2019

If you’ve run the 17.4 release, you have probably seen two 3D rendering tools – 3D Viewer and 3D Canvas – present in the View menu. Why are there two? That’s a good question, and the answer lies in the type of design you ...

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17.4 | APD | 3d model
Cadence to Acquire AWR

By Paul McLellan | 3 Dec 2019

Yesterday Cadence announced that it has signed an agreement to acquire AWR from National Instruments (NI). Cadence will pay approximately $160M and about 110 AWR employees will join us. The acquisition is expected to close in Q1 2020 after regulatory...

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RF | awr | Virtuoso
The Photonics Summit 2019: Hybrid Lasers

By Paul McLellan | 2 Dec 2019

Recently, Cadence held the fourth Photonics Summit and Workshop over two days. I attended the summit. The workshop was hands-on designing an RF photonics front-haul implementation. In fact, that was the focus of the whole summit, which was title...

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Lumerical | silicon photonics | photonics
Experience the Power of OrCAD with Its Trial Version

By AllegroReleaseTeam | 28 Nov 2019

OrCAD Trial 2019 is out. Download and use the full power of the latest release of OrCAD Capture CIS, PSpice, PCB Editor, OrCAD Sigrity ERC, and more, for up to 30 days. Designed to accelerate your productivity, this is a ...

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17.4 | Capture CIS | TRIAL | PSPICE | PCB Editor | OrCAD
IC Packagers: Materially Good Changes in 17.4

By Tyler | 26 Nov 2019

You should be getting used to the new 17.4 release at this point. I am willing to bet there are still exciting new improvements that you haven’t found yet. Today, allow me to show off the new materials editor. It is likely you don’t...

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17.4 | APD