Cadence Blogs

Getting to Hyperscale Data Centers: PCs to Clouds

By Paul McLellan | 3 Apr 2020

This post is a continuation of yesterday's post, Getting to Hyperscale Data Centers: Mainframes to Minicomputers . It continues the story from minicomputers to PCs, and then to today's environment of hyperscale data centers for "big iron...

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PC | server | cloud | cadence cloud
Getting to Hyperscale Data Centers: Mainframes to Minicomputers

By Paul McLellan | 2 Apr 2020

Over the years, the way computing has been delivered has gone through a number of cycles. Like most things in life, this is mostly driven by underlying economics that changes over time: what is the best way to deliver everyone the computer resources...

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minicomputer | mainframe | IBM
BoardSurfers: Allegro In-Design IR Drop Analysis: Essential for Optimal Power Delivery Design

By Shirin Farrahi | 1 Apr 2020

All PCB designers know the importance of proper power delivery for successful board design. Integrated circuits need the power to turn on, and ICs with marginal power delivery will not operate reliably. Since power planes can...

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PCB PI | PCB design | power
The Integrand Story

By Paul McLellan | 1 Apr 2020

Recently, Cadence acquired Integrand Software. I wrote a post about it, Designing Radios: Integrand , a few days later. As I said there: I was actually on the list of "need-to-know" employees on the acquisition, and so I went to the Integr...

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RF | integrand | radio
Virtuosity：2019年Virtuoso Place and Route的博客之旅

By Parula | 31 Mar 2020

为了支持Virtuoso 布局和布线的各种新功能和增强功能，我们的技术专家和作家合作在 2019 年发布了一些内容丰富的博客。此博客是对Virtuoso Placement and Routing博客之旅的一个简要介绍，并为您提供了一个方便的摘要。使您在闲暇时轻松阅读这些博客

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Chinese blog | Modgen On Canvas | structured routing | ICADVM18.1 | Virtuoso Space-based Router | EXL | mesh routing | MODGEN | Automated Device-Level Placement and Routing | Virtuoso Placer | Layout EXL | trunk-to-trunk mesh | Auto P&R | Mixed-Signal | Tree Route | Layout Suite | trunk creation | Generate Trunk | Finish Trunk | EM Trunk Optimization | Custom IC Design | Virtuoso Layout Suite | Custom IC
Cadence Celebrates Women's History Month!

By Mary Kasik | 31 Mar 2020

Women’s History Month recognizes the contributions of women to our history and society. It is a time to reflect on women’s achievements and encourage the continued advancement of gender equality. At Cadence, we want to recognize the women...

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Insights on Culture | inclusion | Culture | women | Women's History Month | diversity
IC Packagers: Don’t Get Stranded on Islands, Delete Them!

By Tyler | 31 Mar 2020

No, this isn’t a Hollywood movie. We’re talking about pieces of plane shapes with no connections to them, not an idyllic private oasis in the Caribbean (sorry). Removing shape islands is something you’ve always been able to do in th...

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Allegro Package Designer | Allegro PCB Editor
Are You Stuck While Synthesizing Your Design Due to Low-Power Issues? We Have the Solution!

By Neha Joshi | 31 Mar 2020

Optimizing power can be a very convoluted and crucial process. To make design chips meet throughput goals along with optimal power consumption, you need to plan right from the beginning!

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Low Power | Logic Design
Linley Spring Processor Conference—In Your Own Living Room

By Paul McLellan | 31 Mar 2020

The annual Linley Spring Processor Conference is coming up next week. It was planned to be in the Santa Clara Hyatt as always, spread over two full days. Well, that's obviously not happening. Instead, the event is going virtual and is spread over fo...

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deep learning | linley processor conference | linley group | neural networks | AI
RSA: Emerging Threats, Ransomware, and IoT

By Paul McLellan | 30 Mar 2020

I attended the recent RSA Conference in San Francisco. I wrote a post about some of the opening sessions, and the closing session, in RSA 2020: From Sulu to Penn & Teller . The Monday of the conference had some special sessions. The one I attended.....

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security | ransomware | rsa conference | rsa | IoT
BoardSurfers: Footprints for Silicon - Two Steps to Creating PCB Footprints

By mrigashira | 27 Mar 2020

Longfellow's metaphorical footprints on the sands of time is more profound and eternal no doubt but a footprint for silicon (a form of sand isn't it?) is as important for PCB designers. So, here we will list the steps to create a fo...

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Allegro PCB Editor
The Mythical Man-Month

By Paul McLellan | 27 Mar 2020

This is a continuation of yesterday's post Fred Brooks "It Is a Humbling Experience to Make a Multi-Million Dollar Mistake" about Fred Brooks' experience developing the IBM System 360. Today I'll talk about the book he wro...

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fred brooks | mythical man-month
Virtuosity: Are Your Layout Design Mansions Correct-by-Construction?

By KomalJohar | 26 Mar 2020

Do you want to create designs that are correct by construction? Read along this blog to understand how you can achieve this by using Width Spacing Patterns (WSPs) in your designs. WSPs, are track lines that provide guidance for quickly creating wires...

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ICADVM18.1 | Advanced Node | Layout Suite | width spacing patterns | Layout | Virtuoso | Virtuosity | usability | Custom IC Design | ux
Fred Brooks: "It Is a Humbling Experience to Make a Multi-Million Dollar Mistake"

By Paul McLellan | 26 Mar 2020

Cadence's Intelligent System Design strategy is about designing the systems of today and tomorrow. But it is instructive to learn lessons from people who built the systems of yesterday. One of the most remarkable systems ever built was IBM's System...

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fred brooks | frederick brooks | mythical man month | os/360
RSA 2020: The Cryptographers' Panel

By Paul McLellan | 25 Mar 2020

One of the big draws on the first day of the RSA Conference is always "The Cryptographers' Panel". The people on the panel vary. This year the panelists were: Whitfield Diffie of Cryptomathic, one of the inventors (with Martin Helman)...

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security | rsa conference | rsa | cryptographers' panel
Virtuoso IC6.1.8 ISR10 and ICADVM18.1 ISR10 Now Available

By Virtuoso Release Team | 25 Mar 2020

The IC6.1.8 ISR10 and ICADVM18.1 ISR10 production releases are now available for download.

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Cadence blogs | ICADVM18.1 | ADE Explorer | IC Release Announcement blog | Virtuoso Visualization and Analysis XL | Virtuoso RF | Virtuoso Analog Design Environment | Virtuoso | IC Release Blog | Virtuoso Layout Suite EXL | Virtuoso Layout Suite | IC6.1.8 | ADE Assembler | Virtuoso Layout Suite XL
How to Get Remote Access to Cadence Academic Tools and Licenses

By Anton Klotz | 24 Mar 2020

With the ever-evolving workplace and classroom, we know that the way we work and learn may be changing. To keep up with that change, we wanted to share some of the possibilities of accessing Cadence tools remotely. Before using any of the scenarios b...

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Europractice | Cadence Academic Network | remote access | EDA | CMC Microsystems | university program
IC Packagers: Identify Your Components

By Tyler | 24 Mar 2020

We’ve all seen bar codes and the more modern QR codes. They’re everywhere you go – items at the grocery store, advertisements and posters, even on websites. Did you know that, with the productivity toolbox in Allegro Package Designe...

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Allegro Package Designer | Allegro PCB Editor
2020 Is the Year of DDR5

By Paul McLellan | 24 Mar 2020

I talked recently to Marc Greenberg, one of Cadence's experts on the memory market. Despite the fact that the JEDEC DDR5 standard is still under development, Marc says that: 2020 will be the year of DDR5. He is excited about it since a new DRA...

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ddr5 | Memory | DDR4
Library Characterization Tidbits: Validating Libraries Effectively

By Jommy | 23 Mar 2020

In this blog, I will brief you about two very useful Rapid Adoption Kits (RAKs) for Liberate LV Library Validation.

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Liberate LV | timing validation | Digital Implementation | interpolation error | library validation | RAKs
Virtuoso Meets Maxwell: Help with Electromagnetic Analysis - Part V

By Kabir | 23 Mar 2020

Here is another blog in the multi-part series that aims at providing in-depth details of electromagnetic analysis in the Virtuoso RF solution. Read to learn about the nuances of port setup for electromagnetic analysis.

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EM Analysis | ICADVM18.1 | VRF | Virtuoso Layout EXL | ports | Virtuoso RF | Electromagnetic analysis | Virtuoso | Virtuoso Layout Suite | Custom IC
Turing Award: Ed Catmull and Pat Hanrahan

By Paul McLellan | 23 Mar 2020

Last week, the ACM announced this year's Turing Award would go to Pat Hanrahan and Ed Catmull for their work on computer graphics. The Turing Award is often colloquially regarded as the "Nobel Prize in Computer Science." It also c...

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vlsi technology | turing award | graphics
Sunday Brunch Video for 22nd March 2020

By Paul McLellan | 22 Mar 2020

https://youtu.be/b7ixzahr85s Made on my balcony (camera Carey Guo) Monday: Another Year of CadenceLIVE—with Updated Schedule Tuesday: Digital Full Flow for 5/7nm Wednesday: How Intel Manufactures Chips Thursday: RSA 2020: From Sulu to Penn &amp...

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sunday brunch
Netflix and C...adence

By Paul McLellan | 20 Mar 2020

Earlier in the week, I wrote about a couple of videos from Intel, about semiconductor manufacturing and the Intel Museum. But with the ongoing rebranding at Cadence, we have a few videos of our own. So when you're bored with your selection on Ne...

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sunday brunch | video | intelligent system design
RSA 2020: From Sulu to Penn & Teller

By Paul McLellan | 19 Mar 2020

I attended the RSA Conference in San Francisco recently. I guess that is going to turn out to be the last conference that I attend for some time. All the other events in my plans have either been postponed or canceled. RSA is the name of a security...

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security | rsa conference | rsa