Cadence Blogs

What Makes Cadence a Great Place to Work?

By MeeraC | 18 Dec 2018

Cadence was recently named number 15 on the 2018 list of the World’s Best Multinational Workplaces, according to global research and consulting firm Great Place to Work® and Fortune Magazine. This is the fourth year in a row that Cadence wa...

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World's Best | Insights on Culture | Culture | Work that matters | GPTW | great place to work
The Economist on Silicon Supremacy

By Paul McLellan | 18 Dec 2018

A couple of weeks ago, the cover story of The Economist was Chip Wars: China, America and silicon supremacy . For the last few years it has been the biggest story in the semiconductor industry. You may already know the incredible fact that the value...

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China | The Economist
Virtuosity: Doing Placement in a Row-Based Environment

By Priya Sriram | 17 Dec 2018

At advanced nodes, Virtuoso provides the capability of defining row templates and generating row regions in the layout design. You can then use the automatic and assisted placement options to place devices, Modgens, and standard cells in these rows.

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ICADVM18.1 | Advanced Node | Virtuoso Placer | Virtuoso Layout Suite | Custom IC | Row-Based Placement
Virtuosity: What Did I Miss in Virtuoso Visualization and Analysis and ADE during the IC6.1.7/ICADV12.3 ISRs?

By Arja H | 17 Dec 2018

Maybe you've been stuck on a project that used an older version of Virtuoso, maybe you've just subscribed to these blogs or maybe you're a new user to Virtuoso and perhaps you don't know about the new cool features that have been added over the course...

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ICADV12.3 | ADE Explorer | Virtuoso | ViVA | IC6.1.7 | Custom IC Design | ADE Assembler
CES Preview

By Paul McLellan | 17 Dec 2018

It's nearly January so it is nearly the Consumer Electronics Show in Las Vegas, which takes place the first full working week of the year, so this year it starts on the evening of 7th, with an opening keynote (this year from LG, taking over from ...

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hifi 5 | vison q6 | dna 100 | Consumer Electronics Show | CES | Tensilica
Sunday Brunch Video for 16th December 2018

By Paul McLellan | 16 Dec 2018

https://youtu.be/izP9iUskcXQ Made at the Cadence Marketing Holiday Party (camera Sean) Monday: RISC-V: Real Products in Volume Tuesday: IEDM: All About Interconnect Wednesday: The Conway Disappearance Effect Thursday: Automotive Summit: The Road...

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automotive | risc-v | lidar | radar | vision | lynn conway | IEDM
PCB设计团队如何在布线之前发现并解决信号完整性问题

By Sigrity | 14 Dec 2018

PCB设计团队面临的一个主要挑战是如何确保设计的按时签发。由于信号完整性工程师通常只能在设计周期的后期发现问题并提出更改要求，设计师们于是不得不一遍又一遍地重复设计 - >布线 - >重新布线这一循环。当SI专家发现与基本反射相关的SI问题如不正确的布线拓扑结构、丢失的终止信号、过冲、回铃或延长的延迟建立时，设计师们的工作则必须重头再来。这一切都令人感到沮丧，特别是当SI专家知道这些基本问题其实可以更早地得到解决。在设计后期发现问题，意味着设计团队之前投入的布线精力都白费了，他们...

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PCB | SI | Chinese blog | PCB设计 | 中文 | Sigrity | 预布线设计 | 信号完整性 | Allegro
Automotive Sensors: Cameras, Lidar, Radar, Thermal

By Paul McLellan | 14 Dec 2018

Yesterday I wrote a sort of overview of the Cadence Automotive Summit that took place in November, in the post Automotive Summit: The Road to an Autonomous Future . Today, the focus in on a key part of automating driving, namely sensors. One of the fi...

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automotive | embedded vision | lidar | radar | ISO 26262 | automotive summit
Breakfast Buffet for November 2018

By Paul McLellan | 13 Dec 2018

https://youtu.be/SxGTX1reCVw The three highlighted posts for November were: Diwali, the Hindu Festival of Lights...and Photonics, the Silicon Festival of Light Inside Google's TPU Mechanical, Thermal, EMI, SI, PI: PCB Design Needs Them All ...

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breakfast buffet | tpu | google | photonics | PCB design
2018 Annual HLS Survey Results

By dpursley | 13 Dec 2018

Earlier this year, we performed the annual high-level synthesis (HLS) industry survey to get an idea of the industry’s expectations of HLS. As in last year’s survey , approximately half of the responses were from current HLS users, and half were from...

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High-Level Synthesis | 5G | survey | machine learning | Stratus | HLS
Automotive Summit: The Road to an Autonomous Future

By Paul McLellan | 13 Dec 2018

Before Thanksgiving, Cadence held an Automotive Summit. I was going to dive into some of the detailed material presented, but it occurred to me that it might be a good time to step back and take a look at where we are in the industry as a whole. I&#3...

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automotive | functional safety | lidar | radar | camera | ISO 26262
Virtuoso: 新序曲—针对高频产品设计的Virtuoso RF解决方法

By deeptig | 12 Dec 2018

最新发布的Advanced Methodology Virtuoso (ICADVM18.1) 引入了Virtuoso RF 解决方法，用户可以利用新的封装设计功能在Virtuoso 内部生成模块，进行封装。

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Chinese blog | Cadence blogs | Virtuoso Overture | ICADVM18.1 | Virtuoso New Design Platform | VRF | Virtuoso Schematic XL | VMT | vsdp | RF design | Custom IC Design | Virtuoso Layout Suite XL
ECO with Stratus HLS and the Digital Implementation Flow

By dpursley | 12 Dec 2018

For years chip designers have dealt with ECO’s when their source code was written in RTL. But the move to high-level synthesis (HLS) means that their source code is now one step further removed from the gate level netlist. This naturally leaves a question...

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High-Level Synthesis | ECO | Conformal ECO Designer | Stratus | HLS
The Conway Disappearance Effect

By Paul McLellan | 12 Dec 2018

Over Thanksgiving weekend, Lynn Conway sent me a link to an article that she'd written for the October edition of IEEE Computer, The Disappeared: Beyond Winning and Losing . Mead & Conway When I interviewed Rob Rutenbar when he received last y...

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mead and conway | lynn conway
IEDM: All About Interconnect

By Paul McLellan | 11 Dec 2018

The first week of December means it is IEDM, the International Electron Devices Meeting. This meeting pre-dates the integrated circuit and nearly pre-dates the transistor, so "electron devices" had a different meaning. In recent decades, th...

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IBM | Samsung | transistor | cfaed | tuv dresden | IEDM
Virtuoso: 新序曲-Simulation Driven Routing 工具简介

By Parula | 10 Dec 2018

总结（摘要）：新版的Virtuoso平台（*ICADVM18.1）提供了突破性的分析功能和创新性的仿真交互布线，用于更为更为强大，更为高效的设计，同时也为最先进的工艺技术提供了强有力的支持。

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Interactive Routing | EAD | Chinese blog | Virtuoso Next | Virtuoso Overture | Virtuoso New Design Platform | electrically aware design | Virtuoso Advanced Release | Simulation-driven interactive routing | Layout | Virtuoso | mixed signal | Custom IC Design | Custom IC
A Cadence Carol, Reprise

By MeeraC | 10 Dec 2018

Last weekend, I took my son to the Dickens Fair for the second year in a row. As we did last year, we had a marvelous time, and I was reminded of the holiday special I wrote last year, as well. So, in lieu of a new post this week, may I direct you to...

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A Cadence Carol | Cadence on the Beat | Creative Writing
RISC-V: Real Products in Volume

By Paul McLellan | 10 Dec 2018

I titled my preview of the RISC-V Summit RISC-V Summit Preview: Pascal or Linux? since it is clear that RISC-V is really the only game in town inside academia, but it still hasn't conquered the commercial world. So it's already Pasc...

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Western Digital | risc-v | NXP | fadu | vega | Qualcomm | sifive
Sunday Brunch Video for 9th December 2018

By Paul McLellan | 9 Dec 2018

https://youtu.be/M_d-K4yE_n4 Made on Cadence pathways (camera Sean) Monday: ICCAD and Open-Source CAD Tuesday: Clayton Christensen on the Prosperity Paradox Wednesday: Benedict's Christmas Present...ation: The End of the Beginning Thursday: Semic...

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针对电气工程师的热管理基础——第四篇

By Sigrity | 7 Dec 2018

作者：Lawrence Der 在热管理基础知识的第一篇中，我们讨论了电域和热域之间的二元性。第二篇中，我们研究了三种不同的热传输机制，并将它们与等效热阻相关联。第三篇中，我们使用热电阻的概念建立了系统的热等效网络，并确定了其等效连结环境（JA）热阻。通过这种方法，我们能够将热阻与系统的物理特性联系起来，并通过等效的热电阻方程直观地了解主要的热传输机制。现在，让我们来进入大家关心的究极问题：散热。散热片散热片是被动热传输器件。在将热量从IC封装传递到周围环境时，其热阻远小于由热对流和热辐...

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PCB | 热 | Chinese blog | 热分析 | 温度 | 中文 | Sigrity | PowerDC | 传热 | 热基础
The Mother of All Demos

By Paul McLellan | 7 Dec 2018

It is the 50th Anniversary on Sunday of a demo that took place on December 9th 1968. It would go on to become known as "The Mother of All Demos" because it changed people's conception of what computers could do and set the agenda for mu...

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stanford research institute | doug engelbart | SRI | mother of all demos
Virtuosity: Designing a Row-Based Layout Methodology – Why does this Make Sense at Advanced Nodes Today?

By Akshat | 6 Dec 2018

At advanced nodes, the complexity and volume of design rules have been growing exponentially. These challenges have contributed to the evolution of a row-based structured layout methodology, which lets you achieve a deterministic layout and increased...

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ICADVM18.1 | Advanced Node | Virtuoso Placer | Virtuoso | Virtuosity | Custom IC Design | Virtuoso Layout Suite | Row-Based Placement
One Cadence, One Team, One...

By Madhavi Rao | 6 Dec 2018

One Cadence, One Team, aaaanddd... One Family! This time of year sees all the India sites celebrate the annual Family Days. It is a way for Cadence to thank employees’ families for all their support over the year and celebrate together as an ex...

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GPTW | Family Day | Cadence India
Semiconductor 2018: Up and to the Right...But Memory Way Up

By Paul McLellan | 6 Dec 2018

I was at a meeting of the ESD Alliance (probably still called EDAC back then) when someone memorably described the EDA industry as being like a water skier being towed behind the semiconductor industry speedboat. As long as the speedboat was going fa...

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Intel | Memory | Micron | NVIDIA | SanDisk | Samsung | EDA | broadcom | Toshiba | ic insights | Semiconductor | Qualcomm | SK Hynix
Benedict's Christmas Present...ation: The End of the Beginning

By Paul McLellan | 5 Dec 2018

Every year Benedict Evans of a16z does a "big" presentation on the future of mobile and digital media. I put the word "big" in quotes because the other annual take on the internet is Mary Meeker's Internet Trends. Here is the 2018 version which comes...

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benedict evans | Internet | a16z