Cadence Community

Virtuoso IC6.1.8 ISR8 and ICADVM18.1 ISR8 Now Available

By Virtuoso Release Team | 11 Dec 2019

The IC6.1.8 ISR8 and ICADVM18.1 ISR8 production releases are now available for download.

0 Comments

Tags:

Cadence blogs | ICADVM18.1 | ADE Explorer | IC Release Announcement blog | Virtuoso RF | Virtuoso Custom Placer | Electromagnetic analysis | Virtuoso | CLE | IC Release Blog | Custom IC Design | Virtuoso Layout Suite | IC6.1.8 | ADE Assembler | Virtuoso Layout Suite XL | clarity
Virtuoso Meets Maxwell: Help with Electromagnetic Analysis - Part IV

By Kabir | 9 Dec 2019

This is the fourth blog in the multi-part series that aims at providing in-depth details of electromagnetic analysis in the Virtuoso RF solution. This part highlights how EM analysis in Virtuoso is compared with other third-party tools in terms of accuracy, performance, capacity, memory consumption, and usability.

0 Comments

Tags:

AXIEM | SiP | ICADVM18.1 | Virtuoso Layout EXL | Virtuoso Meets Maxwell | Virtuoso RF | Package Design in Virtuoso | Electromagnetic analysis | RF design | method of moments | Finite Element Method | Layout Editing | Allegro | clarity
Virtuosity: Sharing Expressions between Pre- and Post-Layout Simulations

By Arja H | 26 Nov 2019

This has been an age old problem, you extract your design and get a DSPF file, then you want to run simulation in Virtuoso ADE Assembler, or Virtuoso ADE Explorer, using that DSPF file, but you find that none of your expressions evaluate. That's because the design is flat in the DSPF file, plus the extractor probably added prefixes to devices, changed the finger delimiters and changed the case of nets etc. You probably...

0 Comments

Tags:

ADE Explorer | Rapid Adoption Kit | DSPF | ADE | postlayout | Custom IC Design | ADE Assembler
Virtuoso Meets Maxwell: Package PDK in Virtuoso! How Is It Even Possible? (Part 2)

By Sanam Vakili | 18 Nov 2019

Alright… I’m back again to amuse you with another part on how to set up Package PDK in Virtuoso. I hope you enjoyed what I introduced to you in the previous part and I hope you are applying what you have learned in your design flow on daily bases.

0 Comments

Tags:

SiP | ICADVM18.1 | Virtuoso Meets Maxwell | Virtuoso RF | Layout EXL | Package Design in Virtuoso | Layout | Virtuoso | System Design Environment | RF design | Modeling | Custom IC Design | Virtuoso Layout Suite | Custom IC | Allegro
Virtuosity: Usability Enhancements in the Property Editor

By KomalJohar | 14 Nov 2019

Goes without saying that the Property Editor is the most frequently used feature of the Virtuoso platform. If you haven’t yet noticed the usability enhancements in the Property Editor, read ahead to know about a few usability enhancements that we have provided in the Property Editor.

0 Comments

Tags:

ICADVM18.1 | Virtuoso Layout Suite L | Property Editor | Custom IC Design | Virtuoso Layout Suite | IC6.1.8
Virtuoso Meets Maxwell: Help With Electromagnetic Analysis - Part III

By Kabir | 11 Nov 2019

This is the third blog in the multi-part series that aims at providing in-depth details of electromagnetic analysis in the Virtuoso RF solution. To know about the benefits of preprocessing of layout shapes for electromagnetic analysis, read

0 Comments

Tags:

ICADVM18.1 | Virtuoso Layout EXL | Virtuoso RF | Layout EXL | Electromagnetic analysis | Virtuoso | Custom IC Design
Virtuoso Video Diary: Click – Take a Snapshot – Smile!

By Rashmi G | 6 Nov 2019

This blog talks about about the Snapshots feature introduced in ADE Verifier in IC6.1.8 ISR6.

0 Comments

Tags:

verifier | Analog Design Environment | ICADVM18.1 | Functional Verification | Formalized Verification | snapshots | ADE Verifier Snapshots | ADE | Mixed-Signal | Virtuoso | cadenceblogs | Virtuoso Video Diary | Custom IC Design | ADE Verifier | IC6.1.8 | Verifier new feature | verification
Virtuoso Video Diary: schTraceNet, a Simple Solution to Complex Questions!

By sarahfino | 31 Oct 2019

Take probing nets to the next level, define a callback based on the SKILL schTraceNet to answer your own complex questions on a schematic design hierarchy.

0 Comments

Tags:

schTraceNet | Virtuoso Schematic Editor | ICADVM18.1 | Net Tracing | video | tracing a net | Virtuoso | Schematic Editor | Virtuoso Video Diary | Probing | Circuit Design | Probes assistant | Custom IC Design | Custom IC | IC6.1.8 | Schematic | net area
Virtuoso Video Diary: Technology File Maintenance Made Easy

By Uma Peethambaran | 23 Oct 2019

The Virtuoso Techfile IDE offers a powerful and modern interface to easily create and modify ASCII technology files.

0 Comments

Tags:

ICADVM18.1 | Techfile IDE | Virtuoso Technology Data | Virtuoso | Virtuoso Video Diary | Virtuoso Layout Suite | Custom IC | IC6.1.8 | technology file
Virtuoso IC6.1.8 ISR7 and ICADVM18.1 ISR7 Now Available

By Virtuoso Release Team | 22 Oct 2019

The IC6.1.8 ISR7 and ICADVM18.1 ISR7 production releases are now available for download.

0 Comments

Tags:

Cadence blogs | ICADVM18.1 | ADE Explorer | IC Release Announcement blog | Virtuoso RF | Virtuoso Custom Placer | Electromagnetic analysis | Virtuoso | CLE | IC Release Blog | Custom IC Design | Virtuoso Layout Suite | IC6.1.8 | ADE Assembler | Virtuoso Layout Suite XL | clarity
Virtuoso Meets Maxwell: Help With Electromagnetic Analysis - Part II

By Kabir | 21 Oct 2019

This is the second blog in the multi-part series that aims at providing in-depth details of electromagnetic analysis in the Virtuoso RF solution. For some useful guidelines on selecting geometries for electromagnetic analysis, read

0 Comments

Tags:

ICADVM18.1 | Virtuoso Layout EXL | Virtuoso Meets Maxwell | Advanced Node | Virtuoso RF | Electromagnetic analysis | Virtuoso | Custom IC Design | Virtuoso Layout Suite
Virtuosity Webinar: Achieving Layout Success with Custom Design Planner and Design Intent - October 29, 2019

By sarahfino | 18 Oct 2019

Enhance productivity with Design Planner and Design Intent. Attend our FREE one-hour webinar with Baby Ravi and Bill Cambouris on Tuesday, 29 October 2019.

0 Comments

Tags:

custom design | Virtuoso Design Intent | training | webinar | Virtuoso | Virtuosity | Cadence Education Services | Custom IC Design | Design Planner
Virtuoso Video Diary: Record. Replay. Relax.

By Pallabi R | 16 Oct 2019

Want to record your work and replay it later? Want to automate things and save time? Then start using the "Record and Replay Files" available in Virtuoso Abstract Generator.

0 Comments

Tags:

abstract generator | ICADV12.3 | ICADVM18.1 | Layout Suite | Virtuoso Video Diary | IC6.1.7 | Custom IC Design | Custom IC | IC6.1.8
Virtuosity: Device-Level Routing for Advanced Nodes—Tree Route Flow

By Parula | 9 Oct 2019

This is the last blog in the Virtuoso Device-level routing blog series and completes a story of how a trunk and a twig became a tree. The blog describes about the ground breaking Tree route flow and its features.

0 Comments

Tags:

tree routing | structured routing | ICADVM18.1 | Virtuoso Space-based Router | mesh routing | Layout EXL | trunk-to-trunk mesh | Mixed-Signal | Tree Route | Layout Suite | trunk creation | Generate Trunk | Custom IC Design | Virtuoso Layout Suite | Custom IC
Virtuoso Meets Maxwell: Package PDK in Virtuoso! How Is it even possible!? (Part 1)

By Sanam Vakili | 7 Oct 2019

You heard it right! Virtuoso now supports Package and Board level designs; therefore, it has capabilities to import/create Package PDKs and libraries in Virtuoso. I have been working at Cadence for the past five years, in four out of these five years I have been mainly focused on our Intelligent System Design Solutions for High-Speed and RF Designs, specifically on how to create and maintain Package PDKs in Virtuoso.

0 Comments

Tags:

SiP | ICADVM18.1 | Virtuoso New Design Platform | Virtuoso Layout EXL | Virtuoso Meets Maxwell | Virtuoso RF | Layout EXL | Package Design in Virtuoso | Electromagnetic analysis | Virtuoso | RF design | Custom IC Design | Allegro
Virtuoso Video Diary: Multi-Technology Simulation—The Good has Changed for Better

By Udit Rajput | 3 Oct 2019

This blog highlights the recent enhancements made to the Multi-Technology Simulation (MTS) feature.

0 Comments

Tags:

ICADVM18.1 | ADE Explorer | Virtuoso Analog Design Environment | Spectre | Virtuoso Video Diary | Multi-Technology Simulation | Custom IC | IC6.1.8 | ADE Assembler | MTS
Virtuosity: Automated Device Placement and Routing—WSP-Based Tree Style Device Routing

By Sravasti | 27 Sep 2019

This blog provides an overview of the last step of the Virtuoso Automated Device Placement and Routing solution. In this blog, I'll talk about the key benefits of the Automated Device-Level Routing functionality.

0 Comments

Tags:

automatic routing | Pin to Trunk | ICADVM18.1 | Virtuoso Space-based Router | EXL | Automated Device-Level Placement and Routing | Automatic Placement | Virtuoso Placer | Layout EXL | Auto P&R | Virtuoso Placement | Placement | tree router | Custom IC Design
Virtuoso Meets Maxwell: Help With Electromagnetic Analysis—Part I

By Kabir | 23 Sep 2019

This blog is the first one in the multi-part series that aims at providing some in-depth details of electromagnetic analysis in the Virtuoso RF solution. To learn about a few tips and tricks on the process setup, read

0 Comments

Tags:

ICADVM18.1 | Virtuoso Advanced Release | Virtuoso Layout EXL | Virtuoso Meets Maxwell | Virtuoso RF | Layout EXL | Electromagnetic analysis | Custom IC Design | Virtuoso Layout Suite | Custom IC
Virtuosity: Automated Device Placement and Routing—Base Layer Fill Insertion

By Sravasti | 19 Sep 2019

Welcome back to my next post in the Virtuoso Automated Device Placement and Routing blog series. At advanced node, after running the placer, there are a few additional requirements for base layers to be taken care of before the layout is routed and taken to completion. In this blog post, I’ll talk about how adding device fills helps meet these requirements. Read the post to know more.

0 Comments

Tags:

automatic routing | device fill | device fills | ICADVM18.1 | Virtuoso Advanced Release | Automated Device-Level Placement and Routing | Automatic Placement | Advanced Node | Virtuoso Placer | Layout EXL | Auto P&R | Virtuoso | Virtuosity | cadenceblogs | Virtuoso Placement | fills | base layer fill | Custom IC Design | Virtuoso Layout Suite
Virtuosity: Layout Reuse Flow in Modgen

By Aneesh Shastry | 15 Sep 2019

Modgen now supports the Layout Reuse Flow. Read on to see how you can use this feature to boost your layout productivity by reducing the time and effort to create Modgen.

0 Comments

Tags:

Modgen On Canvas | ICADVM18.1 | MODGEN | Layout Suite | Layout | Virtuoso | Virtuosity | Layout design | Custom IC Design | modgens | Virtuoso Layout Suite | Custom IC
Virtuoso IC6.1.8 ISR6 and ICADVM18.1 ISR6 Now Available

By Virtuoso Release Team | 10 Sep 2019

The IC6.1.8 ISR6 and ICADVM18.1 ISR6 production releases are now available for download.

0 Comments

Tags:

Analog Design Environment | Cadence blogs | ICADVM18.1 | ADE Explorer | Virtuoso Space-based Router | Automated Device-Level Placement and Routing | Automatic Placement | Interactive and Assisted Routing | IC Release Announcement blog | Virtuoso RF | Layout EXL | ADE | Mixed-Signal | Layout | Virtuoso | advanced nodes | New in EDA | Virtuoso EM Solver | Custom IC Design | Virtuoso Layout Suite | Custom IC | ADE Verifier | IC6.1.8 | ADE Assembler
Virtuoso Meets Maxwell: Add Some MAGic to Your ElectroMAGnetic Analysis

By kfullerton | 9 Sep 2019

If you’ve ever seen a great magician at work, you know that their talent lies in making the impossible look easy. That’s what we have done with Electromagnetic (EM) Analysis in the Virtuoso RF Solution. If you have struggled with cumbersome EM integrations in the past, read further to know what new we have in store for you.

0 Comments

Tags:

ICADVM18.1 | Virtuoso New Design Platform | video | Virtuoso Meets Maxwell | Virtuoso RF | Electromagnetic analysis | EM Analyis | RF design | Custom IC Design | Virtuoso Layout Suite
Virtuosity: Support for Stacked Devices in Modgen

By Aneesh Shastry | 6 Sep 2019

This blog provides an overview of the support for stacked devices in Modgen. This feature makes it easy for you to visualize and edit devices in highly-complex designs, which, in turn, helps achieve higher circuit performance goals in advanced node PDKs. Read the blog post to know more about how to work with stacked devices in Modgen.

0 Comments

Tags:

Modgen On Canvas | MODGEN | Module Generator | stacked devices | modgen stacks | Virtuoso | Virtuosity | Custom IC Design | modgens | Virtuoso Layout Suite | Virtuoso Layout Suite GXL
Virtuosity: Device-Level Routing for Advanced Nodes – Trunk-to-Trunk Mesh Routing

By Parula | 2 Sep 2019

This blog highlights the importance of trunk-to-trunk mesh routing feature for providing customized device-level routing solutions and how it helps layout designers to be more efficient and organized.

0 Comments

Tags:

trunk mesh routing | Trunk generation | Interactive Routing | Pin to Trunk | structured routing | ICADVM18.1 | Virtuoso Space-based Router | mesh routing | Layout EXL | trunk-to-trunk mesh | Layout Suite | trunk creation | Generate Trunk | mixed signal | Finish Trunk | EM Trunk Optimization | Custom IC Design | Virtuoso Layout Suite | Custom IC
Virtuosity: Automated Device Placement and Routing—Row-based Device Placement

By Sravasti | 30 Aug 2019

In this blog, I will focus on the automated placement step that is powered by an engine tailored specifically to meet the unique requirements and challenges of analog device-level layouts at advanced nodes. The device-level automatic placer lets you place devices and device groups in a constraint and grid compliant manner. You can use the interactive device placement options to place devices semi-automatically.

0 Comments

Tags:

Automatic Placement | Virtuoso Placer | Auto P&R | Virtuosity | Virtuoso Placement | Custom IC Design

Custom IC Design Blogs