Cadence Community

Virtuoso Video Diary: What's this Net Connected to?

By sarahfino | 19 Jun 2018

Meet the Virtuoso Schematic Editor L Probes assistant, a dockable assistant where you can identify connections that exist for a net, filter on these connections and save the probe path information to a CSV file.

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Virtuoso Schematic Editor | Virtuoso | Schematic Editor | Virtuoso Video Diary | Circuit Design | Probes assistant | Custom IC Design | Schematic
Virtuosity: Let's Have Fun with ADE Debugging – Part 1

By Kabir | 11 Jun 2018

Over the years, we have seen our customers’ usage of ICRPs increase dramatically. It is now quite common to run 1000s of simulation points using 100s of ICRPs. And as this usage has increased, one of the challenges that has emerged is how to debug issues with ICRPs and job distribution, which is the topic of my write-up. So, what is it that I’m trying to address? Does the following sound familiar? User hits green button...

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performance | ADE Explorer | ADE L | Virtuoso | ADE-XL | Virtuosity | Simulators | Custom IC Design | ICRP | ADE Assembler
Virtuoso IC6.1.7 ISR20 and ICADV12.3 ISR20 Now Available

By Virtuoso Release Team | 8 Jun 2018

The IC6.1.7 ISR20 and ICADV12.3 ISR20 production releases are now available for download. To find out more, click here…

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IC | ISR20 | ICADV12.3 | ADE | Layout | Virtuoso | Virtuosity | IC6.1.7 | Custom IC Design | Custom IC
Virtuosity: How to Run a Multi-Technology Simulation (MTS)?

By Priyanka Dadwal | 31 May 2018

Are you looking for some hands-on experience with running multi-technology simulation in Virtuoso ADE Explorer and Virtuoso ADE Assembler? In today’s fast-shrinking technology, we often have situations where we need to design custom IC system-in-packages (SiP). But, here comes the challenge – how to design these ICs using different technologies in a single design environment and analyze their responses when there are...

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ADE Explorer | Explorer | Rapid Adoption Kit | Virtuoso | Spectre | ADE-XL | Virtuosity | Custom IC Design | Assembler | ADE Assembler
Virtuoso Video Diary: Bridging Virtuoso and Mixed-Signal Simulation Tools Using CLIPS

By Vani V | 25 May 2018

Cadence has introduced Command-Line IP Selector (CLIPS) support to provide a bridge between Virtuoso—a UI-based, analog, and mixed-signal design environment—and other command-line, digital, and mixed-signal simulation tools and flows that use a text-based setup. CLIPS can be used to import an AMS IP into an existing digital-centric verification setup.

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custom/analog | Mixed-Signal | Virtuoso | Virtuosity | Virtuoso Video Diary | Custom IC Design
Virtuosity: What's New in Run Plan – Part II

By Yagya Mishra | 18 May 2018

The Run Plan assistant in Virtuoso ADE Assembler has proved to be one of the most popular features. It provides the capability to create multiple variations of the setup within a single session, each of these runs has their own setup details that override the settings in the active setup. Simulations can be run for all the runs defined in the run plan with a single click. If there are no dependencies, the results are...

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Run Plans | custom/analog | Analog Simulation | ADE | Virtuoso Analog Design Environment | calibration | Virtuoso | Analog Design Environment | Virtuosity | Run Plan | runplan | Custom IC Design | Custom IC | Assembler
Virtuosity: Use Colin Thomson's New RAK to Learn How Legacy Designs Can be Made XL-Compliant

By Rishu Misri Jaggi | 30 Apr 2018

Are you bringing in a Layout L design, or a design made outside of Virtuoso into Virtuoso Layout Suite XL? If that's your plan, and if you do want to realize the real power of Layout XL, Colin Thomson (Product Engineering Architect, CPG) has captured some very useful insights in his new RAK that runs you through the steps to get this transition right. Read along to know some more about the RAK, how to access it, and why...

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Layout XL-compliance | Virtuosity | Layout design | Custom IC Design | VLS XL | Layout Editing | Virtuoso Layout Suite XL
Virtuoso IC6.1.7 ISR19 and ICADV12.3 ISR19 Now Available

By Virtuoso Release Team | 27 Apr 2018

The IC6.1.7 ISR19 and ICADV12.3 ISR19 production releases are now available for download. To find out more, click here…

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IC | ICADV12.3 | ADE | Layout | Virtuoso | Virtuosity | IC6.1.7 | Custom IC Design | Custom IC
Virtuosity: What's New in Run plan – Part I

By Yagya Mishra | 23 Apr 2018

The Run Plan assistant in Virtuoso ADE Assembler has proved to be one of the most popular features. It provides the capability to create multiple variations of the setup within a single session, each of these runs has their own setup details that override the settings in the active setup. Simulations can be run for all the runs defined in the run plan with a single click. If there are no dependencies, the results are...

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Run Plans | ADE | Virtuoso Analog Design Environment | calibration | Virtuoso | Virtuosity | Run Plan | runplan | Verifier Run Plan | Assembler
Virtuoso Video Diary: Reusing Variables through CSV Export and Import

By Rashmi G | 5 Apr 2018

Do you have some specific variables in a test and wonder if you could have a way to reuse them globally for all tests or locally in a particular test? You will be glad to know that Virtuoso ADE Assembler and Virtuoso ADE Explorer offer you a simple and time-saving solution to perform this task. You can now export variables in a CSV file and then use the same file to import them as global or local variables in any session...

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Analog Design Environment | custom/analog | Explorer | Analog Simulation | analog | ADE | Virtuoso Analog Design Environment | Virtuoso | Virtuoso Video Diary | Custom IC Design | Assembler | ADE Assembler
Virtuosity: What if I Want to Disable the Filtered Corners?

By Arja Hunkin | 29 Mar 2018

You'll now be an expert at using the Corner Filters in Virtuoso ADE Assembler and Virtuoso ADE Explorer, I'm sure. But so far, you could only enable the corners you found during filtering. Now, we can offer even more flexibility. You can now disable the corners you find using the filters, and also incrementally enable or disable the filtered corners.

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Corners | ADE Explorer | filter | Filtering | ADE | Virtuoso Analog Design Environment | Virtuoso | Analog Design Environment | Virtuosity | Custom IC Design | Custom IC | ADE Assembler
Virtuoso IC6.1.7 ISR18 and ICADV12.3 ISR18 Now Available

By Virtuoso Release Team | 21 Mar 2018

The IC6.1.7 ISR18 and ICADV12.3 ISR18 production releases are now available for download. To find out more, click here…

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IC | ICADV12.3 | ADE | Layout | Virtuoso | Virtuosity | IC6.1.7 | Custom IC Design | Custom IC
Virtuosity: Signal Browsing Gets Easier with Advanced Search Options

By Ashu V | 14 Mar 2018

Imagine what would happen if we were living in the world with no search engines. Wouldn’t we find ourselves lost in the deep information ocean, struggling to find the relevant stuff? The situation would be chaotic and nothing short of a nightmare. Cutting-edge search technology has given us unprecedented access to information at the click of a button—something that our previous generations could only dream of. Web search...

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ViVa-XL | custom/analog | Virtuoso Analog Design Environment | ViVA | Virtuosity | Circuit Design | Custom IC Design | Custom IC
Virtuosity: Exploring Histories

By Arja Hunkin | 8 Mar 2018

OK we heard you, you want to be able to specify Virtuoso ADE Explorer history names before simulation and you want these histories to increment just like they do in Virtuoso ADE Assembler, right? Let's look at how to do this.

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ADE Explorer | ADE | Virtuosity | ADE Assembler
Virtuosity: Do I Need To Run a Simulation To Plot From a Text File?

By Arja Hunkin | 8 Mar 2018

You'll be glad to hear the answer is No! In Virtuoso Visualization and Analysis, we have a Calculator function available called getAsciiWave, which will create a plot from your text file without the need to create a schematic or a testbench, or run simulation. Let's see how easy it is with the help of an example.

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Analog Design Environment | ViVa-XL | ADE Explorer | Explorer | Analog Simulation | ADE XL | ADE | Virtuoso Analog Design Environment | Virtuoso | Analog Design Environment | ViVA | Virtuosity | Assembler | ADE Assembler
Virtuosity: New Eye Diagram Measurements

By Arja Hunkin | 23 Feb 2018

The Eye Diagram assistant in Virtuoso Visualization and Analysis allows you to create eye diagrams, add masks and also calculate some standard measurements. The measurements have recently been enhanced by adding more jitter calculations, maximum eye height and width calculations, level annotations and Bit Error Rate (BER) curves.

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Eye Mask | Analog Design Environment | ViVa-XL | ADE Explorer | Explorer | ADE XL | ADE | eye diagram | Analog Design Environment | ViVA | ADE-XL | Virtuosity | Custom IC Design | ADE Assembler
Virtuoso Video Diary: Self-Paced Learning through Training Bytes

By Uma Peethambaran | 14 Feb 2018

Cadence Education Services offers several online training courses and training bytes addressing specific features of Virtuoso products. This blog gives you a brief overview about how to find them and enroll.

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training bytes | Virtuoso | Virtuoso Video Diary | Virtuoso Layout
Virtuoso Video Diary: Stranded Wire – A New Sapling in Interactive Routing

By Parul Agarwal | 9 Feb 2018

In order to drive high current and to minimize routing resistivity, it is desirable to draw wide wires. But, in mature nodes, maximum width or maximum density constraints on some metal layers prevent the designers to create wide wires. Another challenge when working with designs at advanced nodes less than 22nm is that it is only possible to route with wires at minimum width. This leads to situations where the current...

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interactive coloring | stranded wire | Virtuoso Space-based Router | weStrandedColorMode | leHiCreateStrandedWire | blockage avoidance | weStrandedAlignCollinearMode | Virtuoso | Stranded Wire Context-sensitive Menu | Virtuoso Video Diary | tieout | weStrandSpacing | tapering in stranded wire | Custom IC Design | WSP support in Stranded Wire | space based router | Custom IC | weStrandedLadderAtTurn | weStrandNum
Virtuosity: Sharing Custom SKILL Calculator Functions

By Arja Hunkin | 2 Feb 2018

Have you ever written a fantastic piece of SKILL to carry out a calculation and wanted to tell the world about it? Or maybe you really need a calculator function to perform a calculation but Cadence does not supply that function with the Calculator or Expression Builder? We have a new Custom IC Calculator SKILL Function Library where you can visit and download custom SKILL scripts and upload any of your own that you...

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Analog Design Environment | ADE Explorer | Virtuoso | ViVA | Custom IC Design | SKILL | ADE Assembler
Virtuosity:Expression Builder - Now Plots ALL!

By Arja Hunkin | 19 Jan 2018

The Expression Builder has simplified writing complex expressions and has the ability to plot or evaluate particular points and corners. But we wanted it to do more, recently we added the ability to plot or evaluate across all points and/or all corners.

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ADE Explorer | ADE | Expression Builder | Virtuoso | ViVA | Virtuosity | ADE Assembler
Virtuosity and Virtuoso Video Diary: Onwards and Upwards

By Ashu V | 16 Jan 2018

Looking back at 2017, I note with satisfaction that it was a phenomenal year of blogging that saw us achieving tons more than we’d dreamed of. Our twin series of blog posts—Virtuosity and the Virtuoso Video Diary—garnered appreciation from all around the world and made it to that coveted special zone in the web browser of our readers—Favorites! Beginning small sometime in the middle of 2016, these series now attract a...

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Cadence blogs | custom/analog | Virtuoso | RF design | Virtuosity | Virtuoso Video Diary | Custom IC Design | Custom IC
Virtuosity: From Hatchlings to Fledglings to a Flock of Birds Blogging Together

By Rishu Misri Jaggi | 14 Dec 2017

“The reason birds can fly and we can't is simply because they have perfect faith, for to have faith is to have wings.” ― J.M. Barrie, The Little White Bird When a few of us in the Cadence CAS Technical Communications Engi...

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Cadence blogs | Virtuoso | RF design | Virtuosity | Virtuoso Video Diary | CPG Technical Communications Engineering
Virtuosity: SKILLful Virtuoso Visualization and Analysis

By Ashu V | 10 Dec 2017

If you’re a SKILL enthusiast, you’ll be happy to know that the latest IC6.1.7 ISR release offers some very useful and handy SKILL functions to perform certain tasks in ViVA. You may find them useful too. Let’s take a quick look at them.

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Analog Design Environment | ViVa-XL | custom/analog | Analog Simulation | SKILL for the Skilled | ADE | Virtuoso | ViVA | Virtuosity | Custom IC Design | SKILL | Cusstom IC Design
Virtuosity: Can I Graphically Edit Width Spacing Patterns?

By Komal Johar | 7 Dec 2017

We have enhanced the editing modes available for WSPs. In addition to the text-based editing, you can now graphically edit WSPs in the preview mode.

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Routing | Advanced Node | width spacing patterns | Layout | Virtuoso | Virtuosity | Custom IC Design
Virtuosity: Can I Plot Signals with Different Axis Units in the Same Window?

By Arja Hunkin | 5 Dec 2017

Have you been frustrated trying to drag signals around in Virtuoso Visualization and Analysis only to see this icon telling you that you can't drag the signal there? You can right-click on the axis and check the Allow Any Units option,...

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virtuoso visualization and analysis | Virtuoso Analog Design Environment | Analog Design Environment | ViVA

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