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Virtuosity: Device-Level Routing for Advanced Nodes—Tree Route Flow

By Parula | 9 Oct 2019

This is the last blog in the Virtuoso Device-level routing blog series and completes a story of how a trunk and a twig became a tree. The blog describes about the ground breaking Tree route flow and its features.

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tree routing | structured routing | ICADVM18.1 | Virtuoso Space-based Router | mesh routing | Layout EXL | trunk-to-trunk mesh | Mixed-Signal | Tree Route | Layout Suite | trunk creation | Generate Trunk | Custom IC Design | Virtuoso Layout Suite | Custom IC
Virtuoso Meets Maxwell: Package PDK in Virtuoso! How Is it even possible!? (Part 1)

By Sanam Vakili | 7 Oct 2019

You heard it right! Virtuoso now supports Package and Board level designs; therefore, it has capabilities to import/create Package PDKs and libraries in Virtuoso. I have been working at Cadence for the past five years, in four out of these five years I have been mainly focused on our Intelligent System Design Solutions for High-Speed and RF Designs, specifically on how to create and maintain Package PDKs in Virtuoso.

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SiP | ICADVM18.1 | Virtuoso New Design Platform | Virtuoso Layout EXL | Virtuoso Meets Maxwell | Virtuoso RF | Layout EXL | Package Design in Virtuoso | Electromagnetic analysis | Virtuoso | RF design | Custom IC Design | Allegro
Virtuoso Video Diary: Multi-Technology Simulation—The Good has Changed for Better

By Udit Rajput | 3 Oct 2019

This blog highlights the recent enhancements made to the Multi-Technology Simulation (MTS) feature.

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ICADVM18.1 | ADE Explorer | Virtuoso Analog Design Environment | Spectre | Virtuoso Video Diary | Multi-Technology Simulation | Custom IC | IC6.1.8 | ADE Assembler | MTS
Virtuosity: Automated Device Placement and Routing—WSP-Based Tree Style Device Routing

By Sravasti | 27 Sep 2019

This blog provides an overview of the last step of the Virtuoso Automated Device Placement and Routing solution. In this blog, I'll talk about the key benefits of the Automated Device-Level Routing functionality.

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automatic routing | Pin to Trunk | ICADVM18.1 | Virtuoso Space-based Router | EXL | Automated Device-Level Placement and Routing | Automatic Placement | Virtuoso Placer | Layout EXL | Auto P&R | Virtuoso Placement | Placement | tree router | Custom IC Design
Virtuoso Meets Maxwell: Help With Electromagnetic Analysis - Part I

By Kabir | 23 Sep 2019

This blog is the first one in the multi-part series that aims at providing some in-depth details of electromagnetic analysis in the Virtuoso RF solution. To learn about a few tips and tricks on the process setup, read

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ICADVM18.1 | Virtuoso Advanced Release | Virtuoso Layout EXL | Virtuoso Meets Maxwell | Virtuoso RF | Layout EXL | Electromagnetic analysis | Custom IC Design | Virtuoso Layout Suite | Custom IC
Virtuosity: Automated Device Placement and Routing—Base Layer Fill Insertion

By Sravasti | 19 Sep 2019

Welcome back to my next post in the Virtuoso Automated Device Placement and Routing blog series. At advanced node, after running the placer, there are a few additional requirements for base layers to be taken care of before the layout is routed and taken to completion. In this blog post, I’ll talk about how adding device fills helps meet these requirements. Read the post to know more.

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automatic routing | device fill | device fills | ICADVM18.1 | Virtuoso Advanced Release | Automated Device-Level Placement and Routing | Automatic Placement | Advanced Node | Virtuoso Placer | Layout EXL | Auto P&R | Virtuoso | Virtuosity | cadenceblogs | Virtuoso Placement | fills | base layer fill | Custom IC Design | Virtuoso Layout Suite
Virtuosity: Layout Reuse Flow in Modgen

By Aneesh Shastry | 15 Sep 2019

Modgen now supports the Layout Reuse Flow. Read on to see how you can use this feature to boost your layout productivity by reducing the time and effort to create Modgen.

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Modgen On Canvas | ICADVM18.1 | MODGEN | Layout Suite | Layout | Virtuoso | Virtuosity | Layout design | Custom IC Design | modgens | Virtuoso Layout Suite | Custom IC
Virtuoso IC6.1.8 ISR6 and ICADVM18.1 ISR6 Now Available

By Virtuoso Release Team | 10 Sep 2019

The IC6.1.8 ISR6 and ICADVM18.1 ISR6 production releases are now available for download.

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Analog Design Environment | Cadence blogs | ICADVM18.1 | ADE Explorer | Virtuoso Space-based Router | Automated Device-Level Placement and Routing | Automatic Placement | Interactive and Assisted Routing | IC Release Announcement blog | Virtuoso RF | Layout EXL | ADE | Mixed-Signal | Layout | Virtuoso | advanced nodes | New in EDA | Virtuoso EM Solver | Custom IC Design | Virtuoso Layout Suite | Custom IC | ADE Verifier | IC6.1.8 | ADE Assembler
Virtuoso Meets Maxwell: Add Some MAGic to Your ElectroMAGnetic Analysis

By kfullerton | 9 Sep 2019

If you’ve ever seen a great magician at work, you know that their talent lies in making the impossible look easy. That’s what we have done with Electromagnetic (EM) Analysis in the Virtuoso RF Solution. If you have struggled with cumbersome EM integrations in the past, read further to know what new we have in store for you.

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ICADVM18.1 | Virtuoso New Design Platform | video | Virtuoso Meets Maxwell | Virtuoso RF | Electromagnetic analysis | EM Analyis | RF design | Custom IC Design | Virtuoso Layout Suite
Virtuosity: Support for Stacked Devices in Modgen

By Aneesh Shastry | 6 Sep 2019

This blog provides an overview of the support for stacked devices in Modgen. This feature makes it easy for you to visualize and edit devices in highly-complex designs, which, in turn, helps achieve higher circuit performance goals in advanced node PDKs. Read the blog post to know more about how to work with stacked devices in Modgen.

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Modgen On Canvas | MODGEN | Module Generator | stacked devices | modgen stacks | Virtuoso | Virtuosity | Custom IC Design | modgens | Virtuoso Layout Suite | Virtuoso Layout Suite GXL
Virtuosity: Device-Level Routing for Advanced Nodes – Trunk-to-Trunk Mesh Routing

By Parula | 2 Sep 2019

This blog highlights the importance of trunk-to-trunk mesh routing feature for providing customized device-level routing solutions and how it helps layout designers to be more efficient and organized.

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trunk mesh routing | Trunk generation | Interactive Routing | Pin to Trunk | structured routing | ICADVM18.1 | Virtuoso Space-based Router | mesh routing | Layout EXL | trunk-to-trunk mesh | Layout Suite | trunk creation | Generate Trunk | mixed signal | Finish Trunk | EM Trunk Optimization | Custom IC Design | Virtuoso Layout Suite | Custom IC
Virtuosity: Automated Device Placement and Routing—Row-based Device Placement

By Sravasti | 30 Aug 2019

In this blog, I will focus on the automated placement step that is powered by an engine tailored specifically to meet the unique requirements and challenges of analog device-level layouts at advanced nodes. The device-level automatic placer lets you place devices and device groups in a constraint and grid compliant manner. You can use the interactive device placement options to place devices semi-automatically.

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Automatic Placement | Virtuoso Placer | Auto P&R | Virtuosity | Virtuoso Placement | Custom IC Design
Spectre Xplored - The New Spectre X Simulator

By Kim Khoury | 28 Aug 2019

New Spectre X Simulator enables large-scale simulation for complex analog, RF, and mixed-signal blocks and subsystems with 3X to 10X performance gains.

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Circuit simulation | simulation performance | ADE | Spectre Tech Tips | Virtuoso Analog Design Environment | Spectre | simulation
Virtuosity: An Introduction to Modgen

By Aneesh Shastry | 22 Aug 2019

This blog provides an overview of Virtuoso Module Generator, also referred to as Modgen. Modgen allows you to create highly matched arrays of devices directly on the canvas. Virtuoso provides you with both GUI options and SKILL APIs to create and customize Modgens.

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EAD | Modgen On Canvas | MODGEN | automation | Automatic Placement | module generation | Module Generator | Layout | Custom IC Design | modgens | Virtuoso Layout Suite | Virtuoso Layout Suite XL
SPECTRE 19.1 Release Now Available

By SpectreReleaseTeam | 21 Aug 2019

The SPECTRE 19.1 production release is now available for download.

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Dynamic Checks | Spectre Fault Analysis | SPECTRE 19.1 | Spectre X Simulator
Virtuoso Meets Maxwell: Here's All You Must Know to Create a TILP

By deeptig | 19 Aug 2019

Did you get a chance to look at the outstanding posts about Technology Independent Layout Pcell (TILP) in the Virtuoso Meets Maxwell series, TILP! What’s a TILP? and Export the Die? What Am I Exporting? To Where?? I am sure it would have been nearly impossible sometime ago to imagine a feature like this being offered in Virtuoso. Now, the Virtuoso RF Solution has brought the revolution by enabling you to create modules...

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ICADVM18.1 | Virtuoso New Design Platform | video | Virtuoso Meets Maxwell | Virtuoso RF | RF design | TILP | Custom IC Design | Virtuoso Layout Suite | technology
Virtuosity: Automated Device Placement and Routing - Grid Generation

By Sravasti | 15 Aug 2019

This blog, the third one in the Automated Device-Level Placement and Routing series, highlights the importance of following a gridded methodology for placement and routing. You'll see how the automated device-level layout flow lets you derive WSPs and row regions automatically, based on the device footprint, layers, and DRCs, with minimal user input.

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ICADVM18.1 | Automated Device-Level Placement and Routing | VPR | Automatic Placement | Advanced Node | Virtuoso Placer | Layout EXL | APR | Auto P&R | Virtuoso | Virtuosity | Virtuoso Placement | Custom IC
Virtuoso Video Diary: Stimuli with Variable Sweeps Videos and Rapid Adoption Kit

By Arja H | 9 Aug 2019

You're probably thinking, "wasn't there a recent blog on the new Stimuli Assignment form in ADE." Well yes, that's right, but we wanted to offer more functionality so from IC6.1.8 ISR4, we now have the ability to preview stimuli waveforms using swept variables. This will be really useful when defining your stimuli. There are a couple of other small usability changes too.

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ADE Explorer | stimuli form | stimuli | Virtuoso Analog Design Environment | ViVA | Virtuosity | Virtuoso Video Diary | ADE Blog Series | Custom IC Design | ADE Assembler | Stimuli Assignment form
Virtuosity: Automated Device Placement and Routing - Identifying Device Groups and Topologies

By Sravasti | 1 Aug 2019

This blog highlights the importance of identifying device groups and topologies in the fully automated device-level placement and routing flow in Virtuoso.

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ICADVM18.1 | Automated Device-Level Placement and Routing | VPR | Automatic Placement | Advanced Node | Virtuoso Placer | Layout EXL | APR | Auto P&R | Virtuoso | Virtuosity | Virtuoso Placement | Custom IC Design
Virtuoso Meets Maxwell: Edit-in-Concert – A New Duet

By Priya Sriram | 30 Jul 2019

This blog highlights a video that demonstrates how to use the Edit-in-Concert mode to edit die packages and layouts. Edit-in-Concert, also referred to as Co-design, is a design editing mode in the Cadence Virtuoso RF Solution. In this mode, the fabrics in a system are superimposed. The current fabric is displayed in the foreground and is available for edit. The fabrics in the background serve as a guide for the design...

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ICADVM18.1 | Edit-in-Concert | EXL | VRF | Virtuoso RF | Virtuoso | Custom IC | Cusstom IC Design
Virtuoso IC6.1.8 ISR5 and ICADVM18.1 ISR5 Now Available

By Virtuoso Release Team | 30 Jul 2019

The IC6.1.8 ISR5 and ICADVM18.1 ISR5 production releases are now available for download.

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ICADVM18.1 | ADE Explorer | Virtuoso Space-based Router | Automated Device-Level Placement and Routing | Automatic Placement | Interactive and Assisted Routing | Virtuoso RF | ADE | Mixed-Signal | Virtuoso Analog Design Environment | Layout | Virtuoso | cadenceblogs | IC Release Blog | New in EDA | Custom IC Design | Virtuoso Layout Suite | Custom IC | IC6.1.8 | ADE Assembler
Spectre Tech Tips: Spectre Local Options

By Stefan Wuensche | 30 Jul 2019

As an analog/mixed-signal designer, verification engineer, or CAD expert, you use Spectre® APS for analyzing your designs. Years back, we introduced the Multi-Technology Simulation (MTS) solution that allows you to simulate multiple chips in a single Spectre run, with each chip using its own device models, temperature definitions, and technology scaling setups. In the MMSIM 15. 1 (October 2015) release, MTS was made...

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highvoltage | spectre aps | scale | skip | Spectre | reltol | scoped options | vrefgnd
Virtuosity: bindStrict or Not in Virtuoso in the Times of Chandrayaan 2

By Rishu Misri Jaggi | 24 Jul 2019

Really, can Virtuoso bind strict? And what does that mean? Read along to find out...

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Update Binding | ICADVM18.1 | Layout XL Environment Variables | cdsenv | Virtuoso | Check Against Source | bindStrict | Custom IC Design | Update Components And Nets | Binder | IC6.1.8 | Virtuoso Layout Suite XL | binding
Tales from DAC: MediaTek's Experience with Spectre X Simulator

By XTeam | 22 Jul 2019

MediaTek recently gave the new Spectre X Simulator a try, and they talked about their experiences with it at DAC 2019 in a presentation given by YY Chen in the Cadence Theater. Spoiler alert: they loved it. MediaTek is the fourth largest fabless IC design company in the world, and they’re ranked #1 in the voice assistant device, android tablet, and network connectivity markets, among others. They, like so many others...

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Cadence Theater | DAC 2019 | mediatek | spectre x
Virtuoso Meets Maxwell: Export the Die? What Am I Exporting? To Where?

By kgjudd | 22 Jul 2019

Here I come back with another episode of TILP of the Virtuoso Meets Maxwell series! In my earlier post "TILP! What's A TILP?", I introduced the concept of Technology Independent Layout Pcell (TILP). Today we are going to create a TILP, which is used in the package design, from a die.

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ICADVM18.1 | die export | Virtuoso Meets Maxwell | Virtuoso RF | die | Layout | Multitech | TILP | Custom IC Design | Virtuoso Layout Suite

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