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Andre Baguenie
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SystemVerilog
Start Your Engines
Spectre AMS Designer
Verilog-AMS
Mixed-Signal
mixed-signal verification

Start Your Engines: The Innovation Behind Universal Connect Modules (UCM)

2 Aug 2024 • 6 minute read

Cadence Spectre AMS Designer is a high-performance mixed-signal simulation system. The ability to use multiple engines and drive from a variety of platforms enables you to "rev up" your mixed-signal design verification and take the checkered flag in the race to the market. The Start Your Engines blog series will provide you with tips and insights to help you tune your simulation performance and accelerate down the road to productivity.

Bonjour!

In this post, I will explain the innovation behind Universal Connect Modules (UCM). They are automatically inserted to the mixed-signal nets in your testbench using Spectre AMS Designer. To understand the concept of connect modules, read in my previous blog, Start Your Engines: Create and Insert Connect Modules for Mixed-Signal Verification.

Universal Connect Modules

Cadence has more than 30 years of experiences in developing mixed-signal simulators. The UCM project is a result of hard work from talented research engineers. We listened to the ideas from customers and the challenges faced by them and decided to create UCM.

The idea was to retain the legacy behavior and provide smart and advanced features to the end user.

UCM consolidates all recommended features from the existing connect modules in the connectLib. All UCM module names start with the letter u.

The name of these connect modules are listed in the following table.

Connect module name

Description

uBidir

Bidirectional connect module (electrical & logic)

uE2L

Unidirectional connect module (electrical to logic)

uE2R

Unidirectional connect module (electrical to real)

uERbidir

Bidirectional connect module (electrical & real)

uL2E

Unidirectional connect module (logic to electrical)

uR2E

Unidirectional connect module (real to electrical)

Table 1: UCM connect module names

The key features of these UCM modules are:

  • They can operate for static or dynamic supplies and have three accuracy modes.
  • They can be used for testbenches with power intent descriptions defined by IEEE LP1801 (UPF) or Accelera CPF
  • The uL2E and bidir connect modules can automatically identify logic strength.
    When these modules are used for conversion to an electrical domain, if a Verilog, Verilog-AMS, or SystemVerilog logic driver provides a supply0 or supply1 strength, the UCM connect module automatically switches from Norton equivalent model to an ideal voltage branch generator to mimic the behavior of supply voltage source.
  • With UCM, it is easy to avoid the generation of X state during conversion of electrical to digital logic values for one of multiple UCM instances.
  • For a logic to electrical conversion, a designer can enable the electrical side current limit and experience a smooth limit operation behavior.
  • To mimic a real CMOS gate switching operation, the designer can enable transcendental output impedance variation in an electrical domain during conversion of digital edge variation from 0 to 1 or 1 to 0.
  • For a dynamic supply voltage UCM, the designer can disable the UCM conversion when the supply voltage magnitude is too low.


Auto-Insertion of UCM

Spectre AMS Designer simulator provides a smart and simple method to control the automatic insertion of UCM in a testbench setup using with IE cards.

 Graphic depicting the source code of the amscf.scs file enabling automatic insertion of UCM
Figure 1: Source code of the amscf.scs file enabling automatic insertion of UCM


In this case, a constant supply UCM is inserted on the mixed node where different types of ports (logic, electrical, real) are connected. IE card is a Cadence proprietary feature used to insert connect modules. It provides support for setting up parameters. IE cards provide strong flexibility of the seven scope statement features. For example, you can apply the given IE card globally or on a net, instance, port, etc.

The AMS simulator automatically inserts the connect modules hierarchically during elaboration. The connect modules are inserted based on the node discipline resolution and port direction at each level of the hierarchy. Using SimVision MS Debug with the testbench as displayed in Figure 2, we observe that the connect modules are automatically inserted at their associated conversion point. They are visualized with the red diamond. The connect module name is backannotated.

 Graphic depicting the SimVision MS Debug Testbench schematic with two UCMs
Figure 2: SimVision MS Debug Testbench schematic with two UCMs

In the figure, an electrical sine voltage source (V1) drives a digital logic inverter (I2). This digital logic inverter drives an electrical resistor (R1). In the netlist for the design testbench, connect modules are invisible. However, SimVision MS Debug reveals the automatic insertion of invisible connect modules, corresponding to the red diamonds in the previous figure.

The waveforms for the simulation results are as follows:

 Graphic depicting a plot in SimVision MS Debug
Figure 3: SimVision MS Debug plots the V(clk) electrical sine signal (red colour), the input logic inverter signal (green colour), and the V(clk_)electrical signal on the resistor port

Conclusion

  • UCM provides three predefined accuracy modes, liberal, moderate, and conservative. These modes help in configuring the mixed-signal simulator for different levels of accuracy and performance. Each accuracy mode efficiently provides a reasonable collection of parameter settings.
  • UCM can be used for a testbench with static or dynamic supplies. It also provides advanced features for mixed-signal verification.
  • The IE card flow is a user-friendly method to enable the automatic insertion of UCM.
  • SimVision MS Debug is very valuable for interactive debugging. The engineer can profile each UCM instances operation dynamically and compare their behavior and execute detailed study. It is an innovative solution which provides changes on mixed signal complex test bench debug. Designers successfully and quickly overcome design issues using SimVision MS for complex verification.

Hope you are now excited to try the features of UCM! If you need more details, contact the Cadence Customer Support team.

~ Andre Baguenier

Related Resources

Blogs

Start Your Engines: Best Practices for Converting a Logic Signal to Electrical Value with Mixed-Signal Modelling

Start Your Engines: Best Practices for Converting an Electrical Signal to a Logic Value with Mixed-Signal Modeling

Start Your Engines: An Innovative and Efficient Approach to Debug Interface Elements with SimVision MS

Start Your Engines: Win Le Mans with the SimVision Mixed-Signal Debug Option

Start Your Engines: Create and Insert Connect Modules for Mixed-Signal Verification

Product Manual Spectre AMS Designer and Xcelium Mixed-Signal User Guide
Product Page Spectre AMS Designer

For more information on Cadence circuit design products and services, visit www.cadence.com. 

About Start Your Engines

The Start Your Engines series would bring to you blog posts from several analog/mixed-signal subject matter experts on a variety of topics, such as introduction to the new features in AMS Designer, tips for enhanced working with existing features, and much more. To receive notifications about new blogs in this series, click Subscribe and submit your email ID in the Subscriptions box.


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