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Whiteboard Wednesdays - 5G PHY Use Cases on B20

By Corrie Callenbach | 19 Mar 2019

In this week's Whiteboard Wednesdays video, Rong Chen talks about the 5G use cases and PHY processing and highlights the B20 DSP features which enable efficient control and DSP processing for 5G modem design. https://youtu.be/TIVHPZr1WVA

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5G | B20 | Whiteboard Wednesdays | ConnX
Whiteboard Wednesdays - Solving Scan Compression Congestion Issues with Modus 2D Elastic

By Corrie Callenbach | 12 Mar 2019

In this week's Whiteboard Wednesdays video, Rohit Kapur, Distinguished Engineer at Cadence Design Systems, discusses the topic of scan compression and the layout problems created as compression ratios grow. The Modus DFT Software Solution targets this impact using its patented physically aware 2D Elastic Compression architecture, without any impact on fault coverage or chip size. For more information, read the datasheet...

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Whiteboard Wednesdays | modus | Scan Compression
Whiteboard Wednesdays - Diagnostics – What Makes Modus Diagnostics an Industry Leading Tool

By Corrie Callenbach | 5 Mar 2019

Cadence distinguished engineer Rohit Kapur introduces diagnostic capabilities in IC testing. Kapur explains the metrics used to evaluate diagnostics tools and discusses why the Cadence Modus DFT Software Solution is the industry-leading solution. For more information, please visit www.cadence.com/modus https://youtu.be/Q-j1t64DwoU

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Whiteboard Wednesdays | modus
Whiteboard Wednesdays - Evolution of the ConnX Family with B10 and B20

By Corrie Callenbach | 26 Feb 2019

In this week’s Whiteboard Wednesdays, Pierre-Xavier Thomas introduces the B10 and B20 as a complement to the ConnX family with higher performance and additional features to support new wireless communications standard and high-resolution radar/lidar applications. https://youtu.be/MaWYNbOEbMo

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Whiteboard Wednesdays | ConnX
Whiteboard Wednesdays - An Introduction to IC Test and Modus

By Corrie Callenbach | 20 Feb 2019

In this week's Whiteboard Wednesdays video, distinguished Engineer Rohit Kapur introduces the concept of scan testing and gives an overview of the Modus DFT Software Solution and Genus Synthesis Solutions from Cadence. Learn the basic steps of Design for Test (DFT) including scan design, test pattern generation (ATPG), and fault simulation. For more information, read the datasheet and visit the product page at www.cadence...

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DFT | Whiteboard Wednesdays | modus | Test
Tensilica HiFi 5 DSP Enabling Machines for Voice UI

By Corrie Callenbach | 13 Nov 2018

In this week’s Whiteboard Wednesday, Sachin Ghanekar, Design Engineering Group director at Cadence, talks about the Cadence® Tensilica® HiFi 5 DSP, and how it works to fill the needs of both front-end processing and neural networks. www.youtube.com/watch

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hifi 5 | Whiteboard Wednesdays | Tensilica | HiFi DSP
Whiteboard Wednesdays - How the Cadence 112G SerDes IP Solves the Challenges of Long-Reach Signaling

By Corrie Callenbach | 6 Nov 2018

In this week’s Whiteboard Wednesday, Wendy Wu explains what NRZ and PAM-4 signaling is all about and the sources of channel loss that make high-speed, long-reach SerDes design so challenging. She then describes the unique architectural advantages of the Cadence® 112G Long-Reach SerDes IP that makes it an ideal choice for high-speed networking and server chip designs. https://youtu.be/s_kZBbbf110

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Whiteboard Wednesdays | 100G Ethernet | 112G SerDes | PAM-4 | SerDes | 400G Ethernet | 800G Ethernet
Whiteboard Wednesdays – Machines with Voice UI and Tensilica HiFi 5 DSP

By Corrie Callenbach | 31 Oct 2018

In this week’s Whiteboard Wednesdays video, Sachin Ghanekar talks about the new Tensilica HiFi 5 DSP, the first DSP optimized for AI speech and audio processing. This fifth-generation HiFi DSP offers 2X audio processing and 4X neural network (NN) processing improvements versus its predecessor, making it ideal for voice-controlled user interfaces in digital home assistants and automotive infotainment. www.youtube.com...

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Whiteboard Wednesdays | HiFi DSP | neural networks
Whiteboard Wednesdays - Cadence Unveils 112G Long-Reach SerDes IP in 7nm Technology

By Corrie Callenbach | 24 Oct 2018

With hyperscale datacenters requiring network switches delivering bandwidths of 12.8 Tbps and beyond, there is strong demand for 112G SerDes IP for the underlying ASICs and SoCs. In this week’s Whiteboard Wednesday, Wendy Wu explains the high-performance networking market drivers and introduces the Cadence® 112G Long-Reach SerDes IP implemented in 7nm process technology. www.youtube.com/watch

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Whiteboard Wednesdays | 100G Ethernet | 112G SerDes | PAM-4 | 400G Ethernet | 800G Ethernet
Whiteboard Wednesdays - Tensilica Neural Network Compiler: An Offline Tool for Efficient Deployment of Neural Networks

By Corrie Callenbach | 9 Oct 2018

In this week’s Whiteboard Wednesda ys video, Megha Daga describes how the Tensilica Neural Network Compiler works, from a trained floating - point network to an optimized source code generation for a Tensilica AI-enabled DSP or processor. https://youtu.be/V9BV_BLIUiI

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DSP | Whiteboard Wednesdays | Tensilica | neural networks | AI
Whiteboard Wednesdays - Significance of Sparsity in Neural Networks

By Corrie Callenbach | 2 Oct 2018

In this week’s Whiteboard Wednesdays video, Megha Daga discusses how handling sparsity positively affects bandwidth, performance, and power efficiency. https://youtu.be/pgouTDPhjlQ

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Whiteboard Wednesdays | convolutional neural networks | neural networks | CNN
Whiteboard Wednesdays - Standalone AI Processor: Tensilica DNA 100 Processor IP for On-Device AI

By Corrie Callenbach | 19 Sep 2018

In this week's Whiteboard Wednesdays episode, Megha Daga describes the new Tensilica DNA 100 Processor IP for on-device AI. This AI processor delivers industry leading high performance and power efficiency across a full range of compute from 0.5 to 100s of TMACs and is well suited for on-device neural network inference applications. https://youtu.be/eT4f2CoBByo

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Whiteboard Wednesdays | dna 100 | AI
Whiteboard Wednesdays - What You need to Know About ISO26262-2018 2nd Edition

By Corrie Callenbach | 4 Sep 2018

In this week's Whiteboard Wednesdays video, the first in a multi-part series, Scott Jacobson explores the changes in the upcoming ISO26262-2018 standard update and how they affect semiconductor design. https://youtu.be/QFV3KIUwJxs

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Whiteboard Wednesdays | ISO 26262
Whiteboard Wednesdays - The Simplest Neural Network Explanation Ever - Part 2

By Corrie Callenbach | 28 Aug 2018

In this week's Whiteboard Wednesday, Tom Hackett continues his explanation of neural network basics using an Excel spreadsheet as a learning vehicle. You can download the spreadsheet here: https://ip.cadence.com/uploads/1213/neural-network-calculator-xlxs-zip https://youtu.be/ow1ZuOPD72I

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Whiteboard Wednesdays | neural networks
Whiteboard Wednesdays - The Simplest Neural Network Explanation Ever - Part 1

By Corrie Callenbach | 22 Aug 2018

In this week's Whiteboard Wednesday, Tom Hackett explains neural network basics using an Excel spreadsheet as a learning vehicle. You can download the spreadsheet here: https://ip.cadence.com/uploads/1213/neural-network-calculator-xlxs-zip https://youtu.be/YAaC94Ke2Ls

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Whiteboard Wednesdays | neural networks
Whiteboard Wednesdays - Von Neumann's 5 Bottlenecks and CCIX - Part 2

By Corrie Callenbach | 31 Jul 2018

In this week's Whiteboard Wednesdays video, Tom Hackett completes the story of the evolving von Neumann computer architecture and the adaptations driven by recent cloud computing challenges. The effort to overcome these challenges has led to the development of a new industry standard called the Cache Coherent Interconnect for Accelerators (CCIX). https://youtu.be/D8pzVq4uJ-E

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Whiteboard Wednesdays | ccix | cloud
Whiteboard Wednesdays - Von Neumann's 5 Bottlenecks and CCIX - Part 1

By Corrie Callenbach | 24 Jul 2018

In this week's Whiteboard Wednesdays video, Tom Hackett traces the evolution of the von Neumann computer architecture through a series of adaptations intended to bypass processing bottlenecks that appeared as more and more demands were placed on computing systems. This provides a historical lens with which to view the recent development of the CCIX interconnect standard. www.youtube.com/watch

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Whiteboard Wednesdays | ccix
Whiteboard Wednesday - Tensilica Hardware Safety Kit ISO 26262

By Corrie Callenbach | 10 Jul 2018

In this week's Whiteboard Wednesday video, Divya Kalimuthu highlights all of the work products that get delivered to a customer as part of the Tensilica Hardware Safety Kit for ISO 26262. https://youtu.be/w-xLdmAuAxs

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Whiteboard Wednesdays | functional safety | ISO 26262
Whiteboard Wednesdays - Introduction to Functional Safety From an IP Supplier

By Corrie Callenbach | 26 Jun 2018

In this weeks Whiteboard Wednesdays Divya Kalimuthu speaks about ISO 26262 from the perspective of a Safety Engineer. She speaks about how the standard is applied in various levels of a supply chain. www.youtube.com/watch

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Whiteboard Wednesdays | functional safety
Whiteboard Wednesdays - Introduction to ADAS with a Real-Life Example

By Corrie Callenbach | 19 Jun 2018

In this week’s Whiteboard Wednesdays video, Marc Greenberg, walks us through a typical ADAS system architecture and then provides a real-life testimonial on the value of these systems. https://youtu.be/EQL4jeD25_g

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Whiteboard Wednesdays | self-driving car | ISO 26262 | ADAS
Whiteboard Wednesdays - What Really Matters When Selecting IP

By Corrie Callenbach | 12 Jun 2018

In this week’s Whiteboard Wednesday, Tom Hackett says that PPA is only the tip of the iceberg of requirements to consider when selecting IP for your next chip design. https://youtu.be/2S6V5RpXECM

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Whiteboard Wednesdays | IP | SoC Integration
Whiteboard Wednesdays - Verification Deliverables Required for Successful SoC Integration

By Corrie Callenbach | 5 Jun 2018

In this week’s Whiteboard Wednesday, YJ Patil explains the importance of having a complete set of IP verification deliverables to speed SoC integration including: IP-XACT description, reusable testbench and test cases, system-level C tests, and user documentation. https://youtu.be/Oc7BmOihvms

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Whiteboard Wednesdays | IP-XACT | Functional Verification | IP integration
Whiteboard Wednesdays - The Advantages and Trade-offs of HBM2 and GDDR6

By Corrie Callenbach | 29 May 2018

In this week’s Whiteboard Wednesday, Marc Greenberg discusses the advantages and trade-offs of two advanced memory interfaces: HBM2 and GDDR6, both targeted to the high-performance computing market. www.youtube.com/watch

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Whiteboard Wednesdays | Memory | HBM
Whiteboard Wednesdays - The Truth about Designing for Automotive Functional Safety

By Corrie Callenbach | 22 May 2018

In this week’s Whiteboard Wednesday, Tom Hackett challenges conventional wisdom and concludes that achieving functional safety means going beyond the letter of the law of ISO 26262 to embrace the spirit of a functional safety culture. www.youtube.com/watch

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automotive | Whiteboard Wednesdays | functional safety | automotive IP | ISO 26262 | ADAS
Whiteboard Wednesdays - An Introduction to Compute In-Memory

By Corrie Callenbach | 16 May 2018

In this week’s Whiteboard Wednesday, Marc Greenberg introduces the concept of “Compute In-Memory” - a hot topic which promises to greatly improve the performance of memory transactions while reducing energy. However, there are alternate approaches that can accomplish the same goals with today’s technology. This video explores the approach and alternatives. https://youtu.be/61J2R42yAzQ

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Whiteboard Wednesdays | Memory | processor | DDR | Compute In-Memory