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Whiteboard Wednesdays
Inductance Extraction
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Whiteboard Wednesdays - Inductance Extraction for Digital Designs

6 Aug 2019 • Less than one minute read

In this week’s Whiteboard Wednesdays, Cadence expert Varun Raj Garapati explains how designers can address inductance effects on clocks, especially on digital SoCs. Using Quantus Extraction Solution for FinFET designs, designers can overcome reliability issues stemming from Inductance effects. To learn more visit https://www.cadence.com/go/quantus-extraction

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