Hi, My understanding is that we can wrap hspice buffer models given a subckt definition. Is that true? I am attaching the information I have fromt the vendor. I appreciate if anybody let me know if I can wrap this model to .dml. Thanks, -Bobby
I couldn't find your attachment. But basically, yes, you can do that.
The answer changes based on whether you are using Tlsim or Hspice as the simulation engine under AllegroSI. If you are targeting your simulation to Hspice, the process is naturally simpler and you can use encrypted and non-encrypted models. Ken Willis wrote a good app-note on how to do this under Articles->Multi-GigaHertz at: http://www.cdnusers.org/community/allegro/Resources/resources_pcbsi/mgh/Howto_wrapHSPice.zipIf you are targeting your simulation to Tlsim (the native simulator), then you will likely need to perform various syntax conversions and possibly get stuck because Tlsim/Espice does not support M element transistors.Hope that helps,Donald
Hi Bobby,Even I am trying to convert the .sp in the deck to a .dml format.If you were successful in doing that, could you plz share that.I assume you would need a .SUBCKT in your main .sp file so that u can define it as Cadence Espice and then Wrap it.In the 'driver.doc' which u attached, there is just a function being called, and the .SUBCKT is in some other file. I think you need to bring those .subckt to the main .sp file and then wrap it as espice, either manually or using spc2dml.Thanks, Bipin
Bobby/Bipin,Appendix B in the aSI-Hspic_Guide.pdf explains how to wrap an encrypted Hspice model. The PDF file can be found at this link:http://www.cdnusers.org/Articles/Download/tabid/163/Default.aspx?title=Using%20Hspice%20as%20the%20Simulation%20Engine%20Under%20Allegro%20PCB%20SIDonald