Randy Bye, Unisys,(user name rb), Charlie Davies, Harris Corporation, and Carl Musetti, SilverStorm Technologies, will be managing this forum as your PCB Design experts. Randy will be your moderator for PCB Design back-end issues, Charlie for front-end issues and Carl for any OrCAD interface issues. They will be promoting forum discussions through posts on topical industry issues, as well as ensuring your questions are answered in a timely manner. Help Randy and Charlie make this a useful forum by adding your insights and expertise. Randy Bye, biography Randy Bye is a Sr. Hardware Engineer for Unisys Corporation where he has amassed 24 years of experience in PCB design for Unisys’ Mainframe and Enterpriser Server computer systems. He is currently responsible for Process Definition and System Administration of Unisys’ deployment of the Cadence Allegro PCB design tools. An active member of the PCB design community, Randy was a past Treasurer and Vice-Chairman of the CCT (Specctra) User’s Group. He is also the past PCB SIG Co-Chair of the International Cadence User’s Group. In 1996 he was recognized with a Technology Leadership award for High-Speed design from Mentor Graphics Corporation. Charlie Davies biography Charlie Davies is the principle ECAE application engineer at Harris Government Communications Systems Division. He has over 35 years of experience in PCB Design and manufacturing. For the last 25 years, he has been the architect of the PWB design environment at Harris. Charlie has authored and presented numerous papers at the Cadence User Group. Carl Musetti biography Carl Musetti is CAD administrator and staff engineer with SilverStorm Technologies, a start up company forging the way for the new infiniband technology. Carl has worked in the EDA industry for over 20 years, working for companies such as Motorola, IBM, and Cadence Design Systems. Carl has worked in PCB design and CAD administration, has designed a multitude of boards of various complexity and technology levels, such as HDI high-speed digital design and RF design. Carl has several certifications within the industry including Certified IPC Designer. Carl has also spent time as administrator writing software utilities for CAD tools to enhance design production.
I am using Allegro to build parts. I have to create a part that tie's two different grounds together (jumper). The two pads will have a trace between them in-order to do this. Does anyone have an idea how I can do this without having the part short and create DRC errors?ThanksBrian
Hello Mr. Bye, Mr. Davies, and Mr. Musetti,MASSolutions Inc. would like to request information on how to become a Cadence OpenChoice IP program partner. MASSolutions, based in Boston, Ma and Ontario, Canada, is a privately held corporation providing enabling technologies for high speed, leading edge electronic circuits, specifically for the printed circuit board markets and their derivatives. We would like to make our IP catalog available within the Cadence Allegro suite to provide PCB engineers access to a disruptive technology that will provide a substantial cost-performance improvement over traditional offerings.Sincerely,Kevin BurnsPresidentMassolutions Inc.15 Commonwealth Ct. Suite 14Boston, Ma firstname.lastname@example.orgTel:617.201.9534Fax:267.821.4597