I am using IC 6.1.5 and I have views of standard cells (schematic and layout) which are not passing LVS (Calibre).
The issue is that in layout I have MOS with a certain number of fingers whereas the schematic have just one finger with the total width.
Layout: M0 w=0.42u num_finger=2
Schematic: M0 w=0.84u num_finger=1
For finger checking purpose, I want to update the schematics to match the layout. Is there a way to do that automatically for a whole library?
You'd probably have to write some SKILL code to do this. You'd probably also need to ensure that the CDF callbacks were called after making the changes (see solution 11018344 ).
For a single schematic, if it was done using layout XL, you could do Connectivity->Update->Schematic Parameters - this would transfer the parameters from the layout devices back to the schematic. However, my guess is that has not been done here as otherwise you'd have spotted the problem before LVS.
Often LVS rules can be set up to compare the total width, but whether you want to do that or not is up to you.