Custom IC Design

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Discussion

Automatic Chaining in Layout GXL

Category: Custom IC Design

By Dhruv N Patel
•
started 1 day ago

0 replies • 48 views
Discussion

Dummy filling in RF sensitive area

Category: Custom IC Design

By SamanMKD
•
started 3 days ago

0 replies • 67 views
Discussion

Vxfi results browser layer filter skill hooks

Category: Custom IC Design

By IA202606139920
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started 4 days ago

0 replies • 101 views
Discussion

Bulk hierarchy path editing of 50 deepprobes, is it possible at all within Virtuoso?

Category: Custom IC Design

By rod1
•
updated 9 days ago by rod1

1 replies • 247 views
Discussion

dbGetTrueOverlaps with diagonals

Category: Custom IC Design

By RC202602061219
•
updated 11 days ago by Andrew Beckett

5 replies • 394 views
Discussion

create bus labels from CSV file

Category: Custom IC Design

By Darrell L
•
updated 18 days ago by IN2FAB

2 replies • 294 views
Discussion

Netlist error

Category: Custom IC Design

By DA202602028132
•
started 24 days ago

0 replies • 161 views
Discussion

How to save PEX post-sim waveforms the same way as pre-sim？

Category: Custom IC Design

By dogman4
•
updated 1 month ago by Andrew Beckett

3 replies • 455 views
Discussion

UMC 65LL: snfp_ll_lvt12 vs snfp_ll_lvt12_corner — which Section for "Single Run, Sweeps and Corners" vs Monte Carlo?

Category: Custom IC Design

By MT202609188310
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updated 1 month ago by Andrew Beckett

1 replies • 244 views
Discussion

Can clip() support multiple time windows?

Category: Custom IC Design

By Johanny Saenz
•
updated 1 month ago by Andrew Beckett

1 replies • 256 views
Discussion

Automatically switch between "sparameter" view and "rfm" view

Category: Custom IC Design

By amitG22
•
updated 1 month ago by amitG22

4 replies • 652 views
Discussion

Why in 2026 still unable to rotate text labels by 45 degrees in symbol view?

Category: Custom IC Design

By SH20260513571
•
updated 1 month ago by Andrew Beckett

1 replies • 319 views
Discussion

Cadence Extremely Slow Plot For DC Sweeps

Category: Custom IC Design

By AY202602197011
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updated 1 month ago by Andrew Beckett

1 replies • 318 views
Discussion

How to setup calcVal (or different approach) when tests differ on number of Design variables

Category: Custom IC Design

By RH202503055935
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started 1 month ago

0 replies • 253 views
Discussion

try_fast_op with SpectreX

Category: Custom IC Design

By SL20260319720
•
updated 1 month ago by SL20260319720

2 replies • 479 views

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