Custom IC Design

Latest Posts

Discussion

Query regarding Virtuoso EMX tool

Category: Custom IC Design

By VLSI lab IITB

$usertype
•
updated 7 days ago by VLSI lab IITB

4 replies • 417 views
Discussion

about cadence virtuoso guidance manual problem

Category: Custom IC Design

By JJ202503031042

$usertype
•
updated 8 days ago by JJ202503031042

3 replies • 329 views
Discussion

Creating Assura DRC rule to check that sep of 2 layers is exactly 2 different values

Category: Custom IC Design

By Miguel V

$usertype
•
started 8 days ago

0 replies • 139 views
Discussion

LVS Warning: “Unattached port label” for PLUS/MINUS on layer ind11_text — can’t locate device

Category: Custom IC Design

By RK202509013321

$usertype
•
updated 8 days ago by RobMan

3 replies • 438 views
Discussion

Dual Core Oscillator Open Loop

Category: Custom IC Design

By IS20250922772

$usertype
•
started 9 days ago

0 replies • 149 views
Discussion

Assembler: possible to disable automatic evaluation of output expressions?

Category: Custom IC Design

By dontpanic

$usertype
•
updated 9 days ago by Andrew Beckett

1 replies • 235 views
Discussion

Assembler: possible to force inclusion of model file(s) at the very beginning of netlist?

Category: Custom IC Design

By dontpanic

$usertype
•
updated 9 days ago by Andrew Beckett

3 replies • 437 views
Discussion

Interactive mode for Spectre using Python/TCL

Category: Custom IC Design

By CB202409064221

$usertype
•
updated 9 days ago by Andrew Beckett

1 replies • 151 views
Discussion

PAC is giving 0V at the output

Category: Custom IC Design

By SA202512302438

$usertype
•
updated 10 days ago by Frank Wiedmann

2 replies • 334 views
Discussion

Replace symbol pin names without changing the pin placement and symbol boundary

Category: Custom IC Design

By SimhanAnalog

$usertype
•
updated 12 days ago by SimhanAnalog

4 replies • 798 views
Discussion

Which simulation tools are supported for Voltus-XFi within Virtuoso environment?

Category: Custom IC Design

By JY202510312553

$usertype
•
started 13 days ago

0 replies • 158 views
Discussion

TSMC PDK Inductor Finder

Category: Custom IC Design

By nqthang

$usertype
•
started 13 days ago

0 replies • 215 views
Discussion

Fundamental question on edge phase noise from sampled PNOISE

Category: Custom IC Design

By Yuto Lau

$usertype
•
updated 13 days ago by Yuto Lau

6 replies • 628 views
Discussion

PWM block gain simulation using pss

Category: Custom IC Design

By TH202510293247

$usertype
•
started 14 days ago

0 replies • 171 views
Discussion

Cadence Virtuoso IC6.1.8 - Layout GXL Automatic Placement

Category: Custom IC Design

By hoangtn3702

$usertype
•
started 14 days ago

0 replies • 143 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.