PEX Results Much Worse Than Schematic Simulation

Hi everyone,

I am working on a low-noise analog amplifier in Virtuoso and recently completed the layout.

The schematic simulation results look good and meet the target specifications. However, after running parasitic extraction (PEX) and re-simulating the extracted view, I observed a much larger gain degradation than expected. The DC operating points remain almost unchanged, but the AC gain drops by around 20%.

I have already checked:

• Device sizes and connections
• LVS clean
• No obvious extraction errors
• Same simulation setup between schematic and extracted views

My understanding is that interconnect parasitics should introduce some degradation, but this amount seems excessive.

For those with experience in analog layout and PEX analysis:

1. What are the most common causes of unexpectedly large gain reduction after extraction?
2. How do you usually identify which parasitic components are contributing the most?
3. Are there recommended debugging techniques within Virtuoso or Spectre to isolate the dominant parasitic effects?

Any suggestions would be greatly appreciated.

Thanks.