Custom IC Design

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Discussion

Can't skip devices inside subckt in Checks/Asserts

Category: Custom IC Design

By AD20260518228
•
updated 3 months ago by Andrew Beckett

1 replies • 383 views
Discussion

How to average a transient-noise iteration family before applying ymax() in ViVA/ADE?

Category: Custom IC Design

By Tifox
•
updated 3 months ago by Andrew Beckett

1 replies • 523 views
Discussion

Cannot Map Schematic Net After Running Quantus QRC

Category: Custom IC Design

By aalbason
•
started 3 months ago

0 replies • 270 views
Discussion

Import def file , get wrong coordinate , it has 0.0005 offset (0.1645 to 0.165)

Category: Custom IC Design

By Charley Chen
•
updated 4 months ago by Charley Chen

1 replies • 413 views
Discussion

Markers covering the waveform itself

Category: Custom IC Design

By Mooh
•
updated 4 months ago by Andrew Beckett

2 replies • 757 views
Discussion

Viva label Expression

Category: Custom IC Design

By Mooh
•
started 4 months ago

0 replies • 295 views
Discussion

Pegasus-Quantus for sky130

Category: Custom IC Design

By TT202604271919
•
started 4 months ago

0 replies • 350 views
Discussion

Monte Carlo over design variable sweep in ADE XL

Category: Custom IC Design

By RA20250218276
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started 4 months ago

0 replies • 749 views
Discussion

One schematic for multiple layouts

Category: Custom IC Design

By M202602061138
•
updated 4 months ago by Kevin T Buck

1 replies • 594 views
Discussion

Stop the simulation after the GUI crash

Category: Custom IC Design

By dogman4
•
started 4 months ago

0 replies • 358 views
Discussion

Liberate for characterizing emerging transistor technology

Category: Custom IC Design

By CW202607067723
•
started 4 months ago

0 replies • 300 views
Discussion

ADE Explorer: How to pass a design variable to a parameter array and another design variable as a string parameter to an instance - Spectre vs. AMS

Category: Custom IC Design

By Volker T
•
started 4 months ago

0 replies • 760 views
Discussion

Efficient iterative methods for threshold extraction (ex: extraction of the input referred offset voltage of a clocked comparator or the calibration code of a bandgap etc.)

Category: Custom IC Design

By baltaci
•
updated 4 months ago by AVAQ Semi

1 replies • 668 views
Discussion

Schematic generation form spice file

Category: Custom IC Design

By VIRAJ PANCHAL
•
updated 4 months ago by VIRAJ PANCHAL

2 replies • 1167 views
Discussion

ERROR WHEN PRESS QUANTUS SETUP FORUM

Category: Custom IC Design

By RM202605273230
•
updated 4 months ago by RM202605273230

1 replies • 415 views

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