Custom IC Design

Latest Posts

Discussion

Assura LVS issue

Category: Custom IC Design

By TU20260412165
•
started 2 months ago

0 replies • 463 views
Discussion

Liberate : error about "tcl command set" in lvf characterization

Category: Custom IC Design

By WZ202603266450
•
updated 2 months ago by Guangjun Cao

1 replies • 414 views
Discussion

Simulating SAR ADC CDAC (floating nodes)

Category: Custom IC Design

By MC202604093258
•
started 2 months ago

0 replies • 641 views
Discussion

LVS rule deck writing - "Mismatched Instance Parameters" (PVS - pvrf)

Category: Custom IC Design

By thiruvenkata
•
started 2 months ago

0 replies • 369 views
Discussion

Saving .srf Files by Time Interval or Signal Condition in Spectre

Category: Custom IC Design

By dogman4
•
updated 2 months ago by Andrew Beckett

1 replies • 515 views
Discussion

copy of a maestro view and chnaging design cause all the setup to be lost

Category: Custom IC Design

By TommasoF
•
updated 2 months ago by mxgong

14 replies • 8542 views
Discussion

Layout XL: what qualifies as a block instance for power routing?

Category: Custom IC Design

By MB202509174350
•
started 2 months ago

0 replies • 386 views
Discussion

Quantus PVS Parasitic Extraction ERROR (LBRCXM-798)

Category: Custom IC Design

By Phd SA88
•
updated 2 months ago by Andrew Beckett

1 replies • 601 views
Discussion

Re: Saving nets that are compatible between schematic and idspf netlists

Category: Custom IC Design

By SL20260319720
•
updated 2 months ago by Andrew Beckett

1 replies • 585 views
Discussion

Stretch-to-Align Functionality in Cadence Virtuoso Layout Editor

Category: Custom IC Design

By baltaci
•
updated 2 months ago by baltaci

2 replies • 874 views
Discussion

Cadence Virtuoso cell unique "birth ID"?

Category: Custom IC Design

By Dali Lai
•
started 2 months ago

0 replies • 227 views
Discussion

Saved nodes appear in the results browser, but cannot plot

Category: Custom IC Design

By peter6g
•
updated 2 months ago by Andrew Beckett

1 replies • 634 views
Discussion

deepprobe with extracted view bus

Category: Custom IC Design

By RC202602061219
•
started 2 months ago

0 replies • 472 views
Discussion

How to have slots avoid vias in Metal Density Toolbar

Category: Custom IC Design

By GM20260213901
•
started 2 months ago

0 replies • 491 views
Discussion

Print noise contributions listed in Noise Summary form automatically

Category: Custom IC Design

By yanirschwartz
•
updated 2 months ago by DomiHammerfall

2 replies • 818 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.