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Custom IC Design

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  • Discussion

    Unable to post/reply with attachments in this forum anymore

    Category: Custom IC Design

    By dontpanic

    •

    updated 3 months ago by Andrew Beckett

    3 replies • 654 views
  • Discussion

    How to force/specify which variable Assembler uses as "x-axis variable" for plotting?

    Category: Custom IC Design

    By AC202503109020

    •

    updated 3 months ago by AC202503109020

    2 replies • 669 views
  • Discussion

    python version of cds_srr

    Category: Custom IC Design

    By AC202503109020

    •

    updated 3 months ago by Andrew Beckett

    1 replies • 614 views
  • Discussion

    Monte Carlo simulations with a multi-process circuit

    Category: Custom IC Design

    By Darrell L

    •

    started 3 months ago

    0 replies • 341 views
  • Discussion

    Guidance on reducing RLCK extraction size for PDN inductance analysis (Quantus PVS)

    Category: Custom IC Design

    By baltaci

    •

    started 3 months ago

    0 replies • 390 views
  • Discussion

    Memory usage during simulation

    Category: Custom IC Design

    By dogman4

    •

    updated 3 months ago by Andrew Beckett

    5 replies • 935 views
  • Discussion

    bindkeys of library manager

    Category: Custom IC Design

    By dogman4

    •

    updated 3 months ago by Andrew Beckett

    1 replies • 559 views
  • Discussion

    Opening layout takes long time after relaunching virtuoso or closing all data

    Category: Custom IC Design

    By MM20260514770

    •

    updated 3 months ago by Andrew Beckett

    1 replies • 545 views
  • Discussion

    Density command query related to Pegasus.

    Category: Custom IC Design

    By SB202511198144

    •

    started 3 months ago

    0 replies • 348 views
  • Discussion

    Potential Simulator Artifacts: Glitches in Isolated Blocks during Transient Analysis

    Category: Custom IC Design

    By SpiceMonkey

    •

    updated 3 months ago by Andrew Beckett

    1 replies • 550 views
  • Discussion

    How to make stack for transistor

    Category: Custom IC Design

    By RM202605273230

    •

    updated 3 months ago by RM202605273230

    11 replies • 2438 views
  • Discussion

    Modify Assembler Max Jobs on Frozen Virtuoso

    Category: Custom IC Design

    By dogman4

    •

    updated 3 months ago by dogman4

    2 replies • 611 views
  • Discussion

    How to adjust the brightness of grid lines in the layout interface

    Category: Custom IC Design

    By JH202504237643

    •

    updated 4 months ago by Andrew Beckett

    3 replies • 923 views
  • Discussion

    DC nested sweep of variables

    Category: Custom IC Design

    By Svilen64

    •

    updated 4 months ago by Svilen64

    16 replies • 5152 views
  • Discussion

    Verilog Parsing Fails

    Category: Custom IC Design

    By OOMR

    •

    updated 4 months ago by Andrew Beckett

    1 replies • 950 views
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