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Custom IC Design

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  • Discussion

    Assura LVS issue

    Category: Custom IC Design

    By TU20260412165

    •

    started 3 months ago

    0 replies • 593 views
  • Discussion

    Liberate : error about "tcl command set" in lvf characterization

    Category: Custom IC Design

    By WZ202603266450

    •

    updated 3 months ago by Guangjun Cao

    1 replies • 560 views
  • Discussion

    Simulating SAR ADC CDAC (floating nodes)

    Category: Custom IC Design

    By MC202604093258

    •

    started 3 months ago

    0 replies • 830 views
  • Discussion

    LVS rule deck writing - "Mismatched Instance Parameters" (PVS - pvrf)

    Category: Custom IC Design

    By thiruvenkata

    •

    started 3 months ago

    0 replies • 674 views
  • Discussion

    Saving .srf Files by Time Interval or Signal Condition in Spectre

    Category: Custom IC Design

    By dogman4

    •

    updated 3 months ago by Andrew Beckett

    1 replies • 667 views
  • Discussion

    copy of a maestro view and chnaging design cause all the setup to be lost

    Category: Custom IC Design

    By TommasoF

    •

    updated 3 months ago by mxgong

    14 replies • 11234 views
  • Discussion

    Layout XL: what qualifies as a block instance for power routing?

    Category: Custom IC Design

    By MB202509174350

    •

    started 3 months ago

    0 replies • 486 views
  • Discussion

    Quantus PVS Parasitic Extraction ERROR (LBRCXM-798)

    Category: Custom IC Design

    By Phd SA88

    •

    updated 4 months ago by Andrew Beckett

    1 replies • 819 views
  • Discussion

    Re: Saving nets that are compatible between schematic and idspf netlists

    Category: Custom IC Design

    By SL20260319720

    •

    updated 4 months ago by Andrew Beckett

    1 replies • 777 views
  • Discussion

    Stretch-to-Align Functionality in Cadence Virtuoso Layout Editor

    Category: Custom IC Design

    By baltaci

    •

    updated 4 months ago by baltaci

    2 replies • 1480 views
  • Discussion

    Cadence Virtuoso cell unique "birth ID"?

    Category: Custom IC Design

    By Dali Lai

    •

    started 4 months ago

    0 replies • 289 views
  • Discussion

    Saved nodes appear in the results browser, but cannot plot

    Category: Custom IC Design

    By peter6g

    •

    updated 4 months ago by Andrew Beckett

    1 replies • 949 views
  • Discussion

    deepprobe with extracted view bus

    Category: Custom IC Design

    By RC202602061219

    •

    started 4 months ago

    0 replies • 620 views
  • Discussion

    How to have slots avoid vias in Metal Density Toolbar

    Category: Custom IC Design

    By GM20260213901

    •

    started 4 months ago

    0 replies • 639 views
  • Discussion

    Print noise contributions listed in Noise Summary form automatically

    Category: Custom IC Design

    By yanirschwartz

    •

    updated 4 months ago by DomiHammerfall

    2 replies • 1366 views
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