Guidance on reducing RLCK extraction size for PDN inductance analysis (Quantus PVS)

Hello,

I am using IC 23.1-64b.43.

My goal is to estimate the series resistance (R) and series inductance (L), including mutual inductance, between the supply (VDD) and ground (VSS) pads and a digital core in a power integrity analysis of a digital circuit. I am primarily interested in the PDN impedance behavior between VDD and VSS.

To reduce parasitic extraction complexity and the size of the extracted view, I simplify the design by keeping only the top-level metal power distribution network (VDD and VSS) between the pads and on top of the digital block. I remove active devices and the digital core, since the internal core behavior (including decoupling capacitance) is already known and modeled separately.

I am currently using the PVS Quantus RLCK extraction flow. However, the resulting extracted netlist becomes very large (~2.5 GB), mainly due to inductive segmentation and dense mutual coupling terms. As a result, Spectre AC simulation fails due to swap/memory exhaustion.

Could you please advise:

1. Is there a way to reduce the size of the extracted RLCK netlist in Quantus PVS, by reducing the number of lumped elements generated during parasitic extraction (e.g., inductive segmentation and mutual coupling complexity), while still preserving sufficient accuracy for PDN AC behavior between VDD and VSS? In other words, is there a supported method to obtain a more compact or reduced-order lumped representation of the inductive network in order to reduce simulation memory requirements and prevent swap/memory exhaustion during Spectre analysis?

2. Outside of the standard Quantus PVS RLCK flow, is there an alternative Cadence-recommended approach or tool to achieve this objective more efficiently? My main goal is to obtain the AC impedance behavior of the PDN (VDD/VSS) from pads to the digital core, effectively capturing series resistance and inductance (including mutual coupling), but in a more computationally efficient or reduced-order form suitable for simulation.

Thank you.