I have a question about the intrinsic capacitance.
In cadence, when we see the operating points, we could know the capacitance values like cgd, cdg, etc. which are based on bsim3v3 capacitance modeling, they are actually the element in a matrix and that's why some are negtive and for example cgd is not the same as cdg.
I actually want to know the parasitic capacitance of each transistor in the amplifier, say a simple common source for example, I think the previous cap values are not the same as the parasitic capacitance, right? Then how can I directly know the parasitc capcitance from the simulation? Or if the question changes to what's the relationship between the capacitances in the table based on bsim3v3 and the real parasitic capacitance?
I know we could run tran analysis to see the capacitance from each node to ground, but that's not the capacitance between two exact terminal nodes.
Thank you in advance.
Does this solution (based on a note I wrote years ago to do the mapping from bsim3v3 partial derivative capacitances to "conventional" caps) help?