Arm and Cadence Showcase AI System Collaboration at AI Infra Summit 2025

At the AI Infra Summit 2025 in Santa Clara, California, Arm's VP of Marketing for the Infrastructure line of business, Eddie Ramirez, and Cadence's VP of Research & Development, Ravi Venigalla, came together to spotlight a transformative partnership driving the future of AI systems. As Ravi noted, "AI is reshaping industries at unprecedented speed, and infrastructure demands are growing beyond the limits of traditional scaling." The shift from commodity servers to purpose-built silicon is accelerating—and Arm and Cadence are leading the charge.

Arm's Neoverse compute subsystems are now being co-validated with Cadence's advanced IP—HBM4, LP6, PCIe Gen7, and UCIe64—leveraging Cadence's Palladium Z3 emulation platform. This allows early validation of complex designs, reducing risk, accelerating time to market, and even enabling rapid development of chiplet-based architectures. "We're focused on custom-built AI hardware," said Eddie. "And we're making it easier and more cost-effective by integrating our Neoverse cores with Cadence's leading-edge IP."

This partnership exemplifies a system-level approach to innovation. "At Cadence, we design for AI—and use AI to design," Ravi explained. Cadence's AI-enhanced EDA platforms are streamlining verification and optimization, "while leveraging acceleration on Arm-based compute to dramatically reduce design cycles and boost performance-per-watt," Eddie added.

Through Arm's Total Design initiative, Arm and Cadence together are enabling a resilient ecosystem—empowering innovators to build scalable, efficient AI systems for the next decade.

Learn more about Cadence's Arm-based solutions.