The Rise of the Autonomous Engineer

Agentic AI in engineering has moved from concept to reality at remarkable speed. What began as isolated AI-assisted workflows is rapidly evolving into fully autonomous systems capable of reasoning, planning, and executing complex engineering tasks. At Computex 2026, Cadence marked a major milestone in this journey with the introduction of the industry's first fully autonomous virtual engineer for chip design—signaling a shift from human‑directed workflows to AI-driven execution at unprecedented scale.

The need for this transformation is clear. Modern chip designs now span trillions of transistors, with a mix of reused IP and substantial new IP innovation integrated into increasingly complex systems. Delivering these designs requires thousands of engineers running millions of simulations and formal tests, consuming billions of compute hours each year. Individual engineer IP projects can take weeks to complete, with verification and debugging cycles often stretching to weeks. As design complexity continues to accelerate, the traditional model is reaching its limits—creating the urgency for a fundamentally new approach.

Full Level 5 Autonomy

Figure 1: 5 Levels of Agentic AI Autonomy

At the center of this milestone is the evolution of Cadence's ChipStack AI Super Agent to Level 5 autonomy. This represents a shift from assistance to independent execution—where AI agents can take a design from specification through verification workflows with minimal human intervention. Engineers remain in control, able to observe, guide, and intervene as needed, while day-to-day execution is handled by always-on AI collaborators operating in familiar environments such as Slack.

Achieving this level of autonomy requires more than a single agent—it requires orchestration. Cadence is introducing a multi-level architecture that spans domain-specific AI super agents through to full project coordination.

ChipStack Design Verification Autonomy

Figure 2: ChipStack Virtual Engineer Agent Autonomy

At the core of this system is a deeply integrated set of engineering skills within the ChipStack AI Super Agent. These skills include the ability to understand specifications, generate and refine RTL, construct testbenches, develop verification plans, run formal and simulation flows, and debug failures. Traditionally, these activities required multiple tools and teams working in sequence. With full autonomy, the ChipStack AI Super Agent orchestrates these skills dynamically—evaluating the state of the design, determining next steps, and applying the right capability at the right time.

This is where autonomy becomes fundamentally different from automation. Instead of executing predefined flows, the ChipStack AI Super Agent reasons across them. It iterates continuously, learning from intermediate results, resolving issues, and converging toward a verified design. The system begins to function as a true virtual engineer—owning the end-to-end workflow while keeping humans engaged for oversight and final signoff.

What enables this level of capability is a critical architectural foundation: tight integration with physics-based engineering tools. Every action taken by the agent is grounded in Cadence's proven design and verification engines, ensuring that results are not only generated quickly, but are also accurate and signoff-ready. This alignment between AI reasoning and physics-based computation is essential for building trust in autonomous systems.

Secure Autonomy

Equally important is how autonomy is governed. The ChipStack AI Super Agent operates within a secure NVIDIA OpenShell sandbox environment, which constrains behavior, enforces policies, and helps protects intellectual property. This provides the governance required for enterprise deployment, ensuring that autonomous systems can operate continuously while remaining safe, auditable, and predictable.

NVIDIA Demo of the Virtual Engineer

In the Computex keynote, NVIDIA showcased a live demonstration that highlighted both the scale and complexity of modern semiconductor engineering—and why autonomy matters. NVIDIA designs industry-leading infrastructure that powers the world's AI factories. Designing the semiconductors at the heart of these systems is one of the hardest engineering challenges in computing. Trillions of transistors must work together across deeply complex, three-dimensional circuits at a microscopic scale. They deploy thousands of engineers running millions of simulations and formal tests, consuming billions of compute hours each year.

Every chip begins as a set of high-level architectural specifications, translated into RTL and rigorously verified through simulation. Even a single bug can delay a product by months. At NVIDIA, thousands of engineers collectively consume billions of compute-hours each year writing, running, and debugging millions of tests—an effort that can take weeks to complete for a single design cycle.

To fundamentally accelerate this workflow, Cadence and NVIDIA have developed a fully autonomous AI design verification engineer. Using simple directives, an engineer can instruct the Cadence ChipStack AI Super Agent to initiate a complete RTL verification loop, executed within a secure environment enabled by NVIDIA OpenShell. There are no manual handoffs—the system drives itself.

The ChipStack AI Super Agent's agents orchestrate hundreds of dynamic simulations using the Xcelium Logic Simulator and perform formal verification with Jasper Formal Verification. These tools expose design flaws directly in the RTL, allowing the agents not only to identify issues, but also to correct bugs in the code and surface critical design decisions back to human engineers for review. The system continuously evaluates results, refines its approach, and iterates toward closure.

The impact is dramatic. Using the ChipStack AI Super Agent, testing and verification cycles can run more than 40 times faster, compressing a process that traditionally takes five weeks into less than a single day.

Video: NVIDIA Application of ChipStack AI Super Agent Autonomy

Innovation Acceleration + Vision

This announcement reflects a multi-year progression in Cadence's AI strategy—one that began with the introduction of its first optimization AI technologies in 2021, including solutions such as Cadence Cerebrus Intelligent Chip Explorer that applied machine learning to accelerate design space exploration and improve engineering outcomes. These early innovations focused on helping engineers optimize workflows and make better decisions faster, establishing the foundation for AI that could go beyond assistance to actively drive results across complex design processes.

From that foundation, Cadence has rapidly advanced into agentic AI and autonomous systems. Following the acquisition of ChipStack in November 2025, the company quickly transitioned from optimization-driven AI to AI capable of executing engineering tasks—launching its first agentic product in early 2026 and expanding into a portfolio of AI super agents at CadenceLIVE in April. This includes the ViraStack AI Super Agent for custom and analog design and InnoStack AI Super Agent for digital implementation and signoff, as well as AgentStack as the orchestration framework coordinating workflows across the design stack.

With this latest announcement, Cadence is now releasing full autonomy applied first to the ChipStack AI Super Agent—marking a shift from AI that optimizes engineering tasks to AI that can execute entire phases of chip design and verification end-to-end. Ultimately, this transformation is about amplifying human potential—enabling junior engineers to learn faster through AI-guided workflows while allowing experienced engineers to focus on higher-value innovation, dramatically increasing their impact across increasingly complex designs.

Availability

The Level 5 autonomous capabilities of the ChipStack AI Super Agent and the AgentStack orchestration framework are expected to be available to early-access customers in the second half of 2026

Learn more about the Cadence AI Stack.