Who Signs the Tapeout? Ziyad Hanna on AI Chip Design – Wearing Flip-Flops

Written by Ronen Laviv, host of Wearing Flip-Flops

An AI agent writes the RTL, builds the testbench, runs the regressions, and closes coverage. Then an engineer signs the tapeout. What exactly is that engineer signing?

Ziyad Hanna, Corporate Vice President of R&D and Strategic Head of AI at Cadence, took on that question as a guest on Wearing Flip-Flops, the semiconductor podcast for chip designers hosted by Ronen Laviv. In episode 13, the first of two conversations, they dig into what agentic AI means for the engineers who still own the silicon.

A Year of Agentic AI at Cadence

It has been a fast year. We acquired ChipStack in November 2025, launched the first product in February 2026, and at CadenceLIVE in April expanded into a portfolio of AI super agents, adding agents for custom and analog design and for digital implementation and signoff, with AgentStack orchestrating the workflows between them.

At Computex 2026, we announced Level-5 autonomy for the ChipStack AI Super Agent. Rather than following step-by-step prompts, the agent evaluates intermediate results, decides its next action, and iterates toward closure across spec understanding, RTL generation, verification planning, formal analysis, simulation, and debug. Engineers inspect and guide, supervising outcomes rather than executing each task.

The results so far show over 40X faster RTL validation cycles, with agents running hundreds of simulations through Xcelium Logic Simulation and Jasper Formal Verification and cutting a typical five-week verification loop to less than a day. Every agent action runs through our signoff-accurate engines, so results stay grounded in the same tools customers use for production tapeouts.

The Questions Engineers Are Asking

Announcements describe what the agents can do. Wearing Flip-Flops is where engineers ask what that means on a real project, and Ronen, who spent 14 of his 25 years in semiconductors at Cadence, knows the tools well enough to push past the headline numbers. The conversation covers:

• What sits inside a 40X faster validation loop, and which part of the work actually shrank
• How a head agent coordinates design and verification agents, and where it hands control back to the engineer
• Why Cadence chose to acquire ChipStack rather than build from scratch
• Who owns the result when an AI agent's work reaches silicon
• How agentic flows fit the way customers build their flows today
• When a chip company should build its own agents, and when to rely on the vendor's
• What chip designers and verification engineers should be learning now for the next five years

The episode takes its name from the tapeout question, and Ziyad's answer is worth hearing in full.

Listen to the Episode

• Episode page: Who Signs the Tapeout? on Wearing Flip-Flops
• Watch or listen on YouTube, Spotify, Apple Podcasts, and all major podcast platforms via wearing-flip-flops.com
• Part 2, on formal verification, AI, and the cloud: Probably Proven

About Wearing Flip-Flops

Wearing Flip-Flops is a hardware podcast for chip designers, with deep dives into verification, emulation, and the silicon powering AI. It is hosted by Ronen Laviv, whose 25 years in semiconductors span chip design at National Semiconductor and 14 years at Cadence. Follow the show on LinkedIn.