A Seamless Cadence Solution for RF and Microwave Designers

Next generation wireless systems integrate heterogeneous technologies to meet demanding size, weight, performance and cost (SWaP-C) requirements. To meet these challenging SWaP-C specifications and ensure accurate simulation results for first-pass design success, engineers need to account for the parasitic behavior and signal degradation that occurs in designs operating at higher frequencies and with greater integration complexity.

The Challenge

With high-speed analog design, interconnects are treated as parasitics, elements that degrade performance, to be accounted for in post-layout simulation. Conversely, in modern RF design, interconnects are critical design elements that can be shaped, tuned, and optimized to enhance system performance. Where analog circuit design focuses mainly on simulating voltage and current waveforms, RF design is concerned with power waves and s-parameters to understand how energy is transmitted and reflected in the system. Because RF/microwave designs operate over a frequency band of interest, network simulations are carried out in the frequency domain rather than the time-domain simulations commonly used to analyze analog designs. Furthermore, RF performance metrics typically include network losses, reflections, and coupling over a wide bandwidth.

The Cadence RF Solution

The requirements for RF/microwave design above are addressed with specialized EDA tools supporting the unique design methodologies and analysis capabilities that differentiate RF from analog design. Developed from a common design framework, Cadence Microwave Office and the Virtuoso Studio RF support the design of III-V compound semiconductor devices such as Gallium Arsenide (GaAs) or Gallium Nitride (GaN) MMICs, RF PCBs, RF silicon ICs, and advanced module design. Each platform supports integrated planar EM (AXIEM in Microwave Office for GaAs/GaN/PCB design and EMX in Virtuoso Studio RF for RF silicon), 3D FEM (Clarity), and thermal (Celsius Thermal Solver) analysis.

Learn More

Join us for this free technical Training Webinar with Sanjeev Kumar, PhD, for an overview of how Cadence's EDA solutions enable RF, microwave, and millimeter-wave designers to effectively manage these rigorous requirements, from initial system modeling through to final manufacturing signoff. 

Date and Time:

Wednesday, March 25

07:00 – 08:00 PDT San Jose/10:00 – 11:00 EDT New York/14:00 – 15:00 GMT London/15:00 – 16:00 CET Berlin/16:00 – 17:00 IST Jerusalem/19:30 – 20:30 IST Bengaluru (Bangalore)/22:00 – 23:00) CST Beijing

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Related Courses

• Planar EM Analysis in AWR Microwave Office Training Course | Cadence
• 3D EM Analysis with Clarity in Microwave Office Training Course | Cadence
• Clarity 3D Solver Training Course | Cadence

Training Bytes

• Yield Analysis in Microwave Office (Video)
• Controlling the Mesh for AXIEM in AWR Microwave Office (Video)

Blogs

• The Power of Clarity in Microwave Office: Transforming 3D EM Simulation - Analog/Custom Design - Cadence Blogs - Cadence Community
• Training Webinar - Microwave Office and EM Simulation - RF Engineering - Cadence Blogs - Cadence Community
• AWR Microwave Office to Allegro RF-PCB Design Flow - System, PCB, & Package Design  - Cadence Blogs - Cadence Community

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