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For the first time at CDNLive Silicon Valley, Cadence Academic Network hosted an Academic Track where seven professors from leading North American universities shared their outstanding work in research and education with the attendees. The Academic Track at CDNLive Silicon Valley was adopted from CDNLive EMEA in Munich, Germany, where a similar track has been well established for the last eight years. The track host for the day was Dr. Patrick Haspel, Head of Global Academic Partnerships and University Programs.
The first session of the day was from Prof. Lawrence Clark (ASU) who spoke about ASU’s predictive 7-nm PDK intended for academic research and classroom use. The day’s topics varied from Prof. Massoud Pedram (University of Southern California) talking about designing energy-efficient circuits and SoCs to Prof. Sung Kyu Lim (Georgia Tech) sharing his learnings from teaching a large Graduate-Level Physical Design Class. Prof. Laleh Behjat (Univ. of Calgary) made her post-lunch session very interactive by demonstrating her gamified curriculum for teaching physical design. The very funny Prof. Mathew Swabey (Purdue University) talked about the challenges academia faces in educating the new generation of SoC engineers by fabricating student SoCs. Prof. Andrew B. Kahng (UC San Diego) stole the show with his talk on bridging the gap between academic research and commercial EDA and won the best paper award. The last presentation for the day was Prof. Aaskash Tyagi’s (Texas A&M) vision to bringing chip design verification to Academia giving everyone a snapshot of his roadmap.
For a first time track at CDNLive Silicon Valley, we were very happy to see all seat filled up at the sessions. At the end of each session, the speakers received a lot of interesting questions from the attendees (especially the industry attendees) that led to some great discussions. Our spy cam also noticed some business cards being exchanged between the academia and the industry attendees.
The cherry on the cake was Prof. Luca Carloni (Columbia University) winning the best paper award in the system verification technical track for his paper on System-Level Design and High-Level Synthesis for Embedded Scalable Platforms.
If you missed the Academic Track at CDNLive Silicon Valley, check out the next Academic Track at CDNLive EMEA on May 2-3, 2016 in Munich, Germany.
You can now view the CDNLive Silicon Valley Academic Track presentations at CDNLive Silicon Valley proceedings page.