Cadence and the Academic Network Support Design Contests in the Asia Pacific

Design contests are a unique way for students to get hands-on experience using Cadence® tools, while in a fun and competitive environment. It is important to the Cadence Academic Network to support design contests so that we can help the next generation of engineers get access to leading-edge Cadence technology. Recently, Cadence and the Academic Network have worked hand-in-hand with several universities and academic organizations to host design contests covering a variety of technical fields. 

China Post Graduate Integrated Circuit Innovation Competition 

Cadence Academic Network and Cadence Worldwide Field Organization sponsored the China Post Graduate Integrated Circuit Innovation Competition (CPIPC) for the third year in a row! Cadence also supported the competition in a variety of other ways: technical support was provided by Cadence employees; a Senior Group Director for the Digital & Signoff Group at Cadence, gave the keynote talk at the Competition Summit Forum; and Cadence distributed the Special Award to the winning team from Xidian University. 

With over 1300 student participants from 93 universities, Cadence is able to play a critical role in shaping future engineers. The 1300+ students were broken into 468 teams, which competed from April until August 2019. 151 teams made it to the finals, which were hosted from August 2-4, 2019 in Hangzhou, China. It’s a great opportunity for Cadence to build our brand among students, connect with academia, and attract the brightest talent! 

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CEDA HK EDAthon 2019 

Cadence, in collaboration with The Chinese University of Hong Kong and the Hong Kong chapter of IEEE Council on Electronic Design Automation (CEDA), hosted the EDAthon 2019. On July 26, 2019, two-person teams of senior undergraduate or graduate students competed in a day long programming contest where they tackled interesting and challenging topics in the Electronic Design Automation (EDA) field.  

The competitors were given five problem statements and sample test data from the following areas: 

• System Design and Analysis 
• Logic and High-level Design 
• Physical Design 
• Circuit Analysis 
• Emerging Technologies (DFM, Biochip, Machine Learning, etc.) 

Winners were chosen based off answer correctness under the given constraints and hidden benchmarks.  

Supporting the CEDA HK EDAthon 2019 gave Cadence a great opportunity to engage with students and build stronger relationships with professors from top universities in China. Cadence looks forward to supporting this event in the years to come! 

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The 8th IT Convergence Design Skills Competition 

Korea Polytechnic University hosted the 8th IT Convergence Design Skills Competition on July 11, 2019, sponsored by Cadence and NineplusIT. There were a total of 52 teams, which was more than 100 students participating in the competition.  

Students used PSpice software and PCB Artwork using OrCAD PCB Designer, in order to get practical experience using industry tools on the entire design process:  from design to simulation, fabrication and measurement, and implementation of microprocessor application box. The goal of the competition was to improve the quality of hands-on education at Korea Polytechnics in the field of electronic and semiconductor circuit design.  

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The Academic Network is excited to be a supporter of events that encourage future engineers to work with leading-edge technology to find innovative solutions to technological challenges. 

Stay up to date with the events that Cadence is a part of by checking our events page. You can also subscribe to the Academic Network newsletter to get updates on Cadence technology or join our LinkedIn group to engage with members in our network. Read our blog to learn about all the Academic Network activities.