Cadence Awards Digital Badges to 54 Students During the 58th Annual Design Automation Conference

As part of the DAC Young Fellows Program at the annual Design Automation Conference, Cadence held a virtual training on High-Level Synthesis for students who earned digital badges upon completion.

The Young Fellows Program gave students a variety of opportunities for professional development including presentation and writing skills, meet ups with recruiters, technical development, and social programs. Within the program, Cadence offered a technical development workshop on High-Level Synthesis to all interested DAC Young Fellows. “The DAC Young Fellows Program had 310 students from all over the world, and the opportunity to work with Stratus tools and build their skillset was a program highlight for them,” said Professor Matthew Morrison of the University of Notre Dame. Professor Morrison led the teaching material of HLS to the students. . “Engineers are moving toward HLS because it greatly improves the productively in evermore complex designs!”

We received great feedback! Here’s what a few of the DAC Young Fellows who completed the Cadence training had to say.

Mariam Rakka, University of California - Irvine

Mariam Rakka, an Electrical Engineering and Computer Science PhD student from the University of California, Irvine stated, “ The introduction to High-Level Synthesis tutorial that I completed as part of that young fellows program equipped me with the needed techniques to translate a Deep Neural Network into different SystemC modules and analyze the trade-offs. I believe this knowledge will help me in my doctoral research, as it facilitates software-hardware co-design and allows optimizing brain-inspired networks on resource-constrained hardware modules.”

Zishen Wan, Georgia Institute of Technology

 

Zishen Wan, an Electrical and Computer Engineering PhD student from the Georgia Institute of Technology stated, “It was a great experience to attend the Cadence High Level Synthesis Tutorial during DAC 2021 Young Fellows Program. We had the chance to use TensorFlow, SystemC and Stratus HLS tool to implement a neural network software and hardware model. I’m pleased to see HLS can ease hardware implementation and verification and facilitate design space exploration. It would be a very helpful tool for next-generation software-hardware co-design process!”

When Cadence Design Systems provided the opportunity for students to partake in this training, 54 of the students who started the tutorial, completed it and received a digital badge certificate to display on their LinkedIn pages and resumes. The students demonstrated fundamental understanding of machine learning, SystemC, Transaction-level Modeling, and logic synthesis paradigms. Cadence Design Systems congratulates all the students who participated in the High-Level Synthesis Tutorial - DAC 2021.