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Cadence Academic Network is supporting for years PRIME (PhD Research in Microelectronics and Electronics) and SMACD (Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design) conferences, so we were quite happy that both conferences decided to combine their organization efforts and both found place in beautiful Lisbon / Portugal at Instituto Superior Tecnico Congress Center.
PRIME is a conference, founded by Professor Franco Maloberti in 2005, where PhD students from all over Europe are presenting their work. For Cadence it is a career fair, where we can meet with high potentials, who might consider continuing their career at Cadence. There is a conference slot, where sponsors (Cadence, On Semi, Dialog Semiconductors) present their companies and tell why the students should join them.
Beside the sponsor slot Cadence engineer Alexandre Roybier provided a 4 hour workshop about the new features of Virtuoso 6.1.7, especially the new ADE versions Explorer, Verifier and Assembler, which was very well received by the numerous attendees. Seems that the young generation of analog designers understands the necessity of making some thoughts about the planning and functional verification of their design before starting designing it.
One of the highlights of the SMACD conference is the EDA competition, where students and academic researchers present EDA software, which were written by them to a jury which consists of representatives from academia and industry. The presentation should include the explanation about the functionality of the software, but also a demo of the software itself. It was quite surprising what a single person or a small team can achieve after years of development work. After eight presentations the jury could not decide on a single winner (the prize was 1000 EUR), so it has been decided to split the prize money among two winners. One winner was Carlos Silva from Instituto Politécnico de Tomar for SCALES: A High Speed Simulator Tool for Pipeline A/D Converters, which allows topology selection and the digital calibration of the main frontend blocks. Additionally, the tool generates also the required Verilog code to implement the digital calibration block. Another winner was Fábio Moreira de Passos for SIDe-O: A Toolbox for Surrogate Inductor Design and Optimization. This tool allows very fast model creation of inductors, which have less than 1% error compared with full EM simulation.It also allows the creation of an S-Parameter file that accurately describes the behavior of the inductor for a given range of frequencies, which can later be used in SPICE-like simulations.
The Instituto Superior Tecnico are long-time users of Cadence technology. The Chipidea Microelectronica S.A. was founded in its rooms in 1997, before it was bought by MIPS Technologies in 2007. I would like to thank Professors Nuno Horta and Jorge Fernandez from IST for the great organization of the both conferences and their engagement in microelectronics education in Portugal.