Tensilica Day in Hanover

The idea to have a Tensilica Day at University of Hanover was born during CDNLive EMEA 2015. Professor Holger Blume, whose team has a lot of experience using Tensilica, offered to help us, to organize the event at his facilities and invite all universities, he is aware about, who are also working with Tensilica processor IP. Cadence part was to organize technical presentations provided by our Tensilica experts and invite commercial partners. This kind of academic-industrial events is very effective way to educate and establish contacts between students, industrial partners and Cadence, which is one of the primary aims of Cadence Academic Network.

Tensilica processor IP is available for universities for research purposes for no charge. The only limitation is that no RTL or FPGA bitstream can be generated, so the processor can be run in simulator only.  Currently more than 20 universities are active users of Tensilica IP. Selected universities also have access to RTL or FPGA bitstream, which requires a separate contract with Cadence.

On 9^th February more than 80 attendees from academia and industry were listening to technical presentations from Marcus Binning, who is Senior AE Manager based in UK and main point of contact for Tensilica customers in Northern Europe. During the lunch break the attendees had the chance to see technology demos of Tensilica usages in academic projects, e.g. in Computer Vision, Digital Audio Processing or even accelerated database search algorithms.

After the lunch the academic institutions and commercial companies presented papers about their work with Tensilica processor IP, but also about general ideas on reconfigurable and adaptable hardware, even on runtime. DreamChip GmbH presented a SoC, which is supposed to replace car mirrors and includes several Tensilica cores and other Cadence design IP. The SoC will be manufactured in GlobalFoundries 22DFX FD-SOI technology as part of the THINGS2DO EU-sponsored project.

Professor Michael Huebner from Ruhr University Bochum presented ideas how to implement FPGA structures as part of processor execution unit, so it can be adopted to the current requirements of the performed algorithm. All presentations are available here.

The feedback of the attendees was very positive, therefore it has been decided to have Tensilica Day as an annual event.