Reinvigorate Silicon Design with AWS

27 Aug 2023 • 4 minute read

Innovations in silicon design have fueled recent technological advancements in the electronic industry. Chips, from mobile devices to cars and healthcare systems, are now pervasive and essential to our daily lives. The increasing functionality of SoCs has increased the verification complexity, and the design teams are constantly under pressure to tapeout the reliable chips faster. These factors result in longer validation cycles-- prohibiting timely, high-quality tapeouts. Cadence is helping the design community overcome these challenges by leveraging AWS's virtually infinite compute and storage capacity. The elasticity of Amazon Web Services (AWS) helps address this demand curve by eliminating the need to choose between cost and efficiency. AWS Graviton3 CPU and C7G instance family offer cost efficiency (server) and performance improvements for Cadence’s EDA workloads. In the recent CadenceLIVE 2023 at Silicon Valley, AWS presented various AWS technologies to expedite silicon design and achieve faster tapeouts. They also shared a few anecdotes of how organizations have successfully leveraged AWS's scale, speed, performance, and agility to reinvigorate their silicon design methodologies and shape the next generation of design engineers.

With the increasing transistor count over SoCs and the adoption of advanced nodes, designing chips has become very complex. It involves numerous simulations to ensure optimal performance within specified limits. Running these simulations requires substantial resources such as EDA licenses, computing power, memory, and storage. The computation and storage need for designing next-gen silicon chips are growing exponentially to meet the market demands of increased functionality and performance while simultaneously reducing power consumption. Recent observations indicate a staggering annual rise of 31% in compute infrastructure and 39% in storage demands.

The adoption of advanced nodes is causing a significant surge in infrastructure demands. Chip manufacturers have observed a notable rise of 2X to 4X in compute infrastructure requirements and an 8X increase in storage demands when transitioning from 5nm to 3nm process technology. It is important to highlight that infrastructure needs fluctuate throughout the chip design process. There are instances of surplus capacity during specific periods, while other times necessitate additional capacity.

These dynamic demands often result in insufficient on-premises compute and storage capacity during peak hours. This leads to reduced productivity as during peak time, developers often have to wait for resource availability, especially when several jobs are waiting in the scheduler. It is not wise to let developers wait for the process/job completion, as they are the costliest proposition in the chip design process.Such conundrums often lead to project delays during peak usage intervals. To overcome this issue, compromises may be made on coverage and runs, which can negatively impact the quality of the project. To keep pace with rapid technological advancements and meet the growing productivity requirements, there is a need for a shift in chip design methodology.

Recent research indicates that cloud services offer scalability that can boost SoC design productivity while reducing costs. With cloud services' elasticity and capacity, customers can easily follow the EDA demand curve, enhancing developer productivity and zero wait time in job queues. Consequently, chip manufacturers are increasingly migrating their EDA workloads to the cloud, with AWS being the most widely adopted globally, emerging as the leading choice worldwide.

How AWS reinvigorates the silicon design process

AWS offers a virtually unlimited capacity that can be scaled up or down based on customer requirements, providing the flexibility to select the best instances for specific workloads. Running semiconductor workloads in the AWS Cloud provides a multitude of advantages, a few of which are as follows:

Courtesy: AWS

Improved productivity
High availability and durability
Match compute resources to workload requirements
Accelerated upgrade cycle
Price-performance benefits
Paves the way for meeting sustainability goals- reduces carbon footprint

So, concisely, as technology advances, on-premises infrastructure may struggle to meet demand. AWS adoption is an attractive option for meeting bursty EDA workload demands. Arm studied the Graviton family of AWS instances’ performance across various Cadence EDA workloads; for more details, click here.

Summary

AWS offers immense computing power, storage, and resources that customers can leverage to run various aspects of their silicon design. Some customers have even carried out the entire design flow on AWS. The latest Arm-based processors developed by AWS, such as the Graviton3 Amazon EC2 instances, deliver the same level of performance while consuming up to 60% less energy. In conclusion, AWS offers better productivity and improved cost efficiency. By utilizing AWS, chip design companies can reinvigorate the silicon design process.

Learn More

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