Get email delivery of the Cadence blog featured here
SAN JOSE, Calif.--Sometimes in the electronics industry, the best questions are at once the simplest and scariest. Consider the one raised in a DVCon 2014 panel (Richard Goering blogged in detail here): Have we created the verification gap?
I invited Cadence Senior Architect JL Gray and ChipDesign Magazine Editor John Blyler to join me at our DVCon video studio to frame the question. After all, Gray conceived the panel and Blyler moderated.
Gray decided to take things up a notch by proposing additional--and unsettling--questions:
Here's what the two gentlemen had to say:
--DVCon 2014 Panel: Did We Create the Functional Verification Gap?