Cadence® system design and verification solutions, integrated under our Verification Suite, provide the simulation, acceleration, emulation, and management capabilities.
Verification Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
More Support Log In
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
The Cadence Academic Network helps build strong relationships between academia and industry, and promotes the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence.
Participate in CDNLive
A huge knowledge exchange platform for academia to network with industry. We are looking for academic speakers to talk about their research to the industry attendees at the Academic Track at CDNLive EMEA and Silicon Valley.
Come & Meet Us @ Events
A huge knowledge exchange platform for academia. We are looking for academic speakers to talk about their research to industry attendees.
Americas University Software Program
Join the 250+ qualified Americas member universities who have already incorporated Cadence EDA software into their classrooms and academic research projects.
EMEA University Software Program
In EMEA, Cadence works with EUROPRACTICE to ensure cost-effective availability of our extensive electronic design automation (EDA) tools for non-commercial activities.
Apply Now For Jobs
If you are a recent college graduate or a student looking for internship. Visit our exclusive job search page for interns and recent college graduate jobs.
Cadence is a Great Place to do great work
Learn more about our internship program and visit our careers page to do meaningful work and make a great impact.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
Overview All Courses Asia Pacific EMEANorth America
Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.
Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technology. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
Get email delivery of the Cadence blog featured here
Dark Silicon sounds like it should be the title of a
best-selling thriller novel, and in a way, it is a thriller when it comes to
the future of semiconductors. Will advanced nodes produce a huge mass of
transistors that will go "dark" because we can't afford to power them? Will all
our dreams about a more intelligent Internet come to a crashing halt because of
this unforeseen problem?
These provocative questions were raised by Mike Muller, ARM CTO, at the March 25 EE Times "Designing with ARM" virtual conference.
Co-sponsored by Cadence, the one-day event also included panels, chats, and
virtual exhibit booths.
Redefining the mobile
Muller's keynote didn't go to the "dark side" right away. He
first painted an optimistic picture of what the mobile Internet could be like
in another ten years. Muller envisioned a time in which clients will have
power, complexity, and performance that's equivalent to high-end servers today.
These clients could be embedded in any device - digital picture frames, smart
energy meters, printers, you name it. "The Internet will no longer be seen as
servers," he said. "It will become the software platform that defines what will
be run on the client."
Cloud computing will define the software platform, Muller
said. Software that is "programmed from the cloud, and communicated from the
cloud, is going to transform what the pervasive Internet is all about." As a
result, he said, a lot of today's "static" consumer products will gain Internet
capability in way that will transform the functionality they offer.
The dark lining
behind the clouds
But there's "trouble in paradise up in the clouds," Muller
said. And that trouble is what he calls "dark silicon."
It's a matter of simple math. From today's 45 nm node to the
11 nm technology of 2020, Muller said, we should be able to achieve a scaling
factor of 16. Frequency won't grow as much as it has in the past, but an 11 nm
design should run at 2.4X the speed of an equivalent 45 nm design. The power
consumed per transistor will fall to perhaps 60 percent.
So, given the same power budget used for the 45 nm design
today, if an 11 nm design has 16X the transistors running at 0.6X the power, "I
can actually use only 10 percent of them in my new design," Muller said. "The
rest is dark silicon. We need to find ways of lighting that silicon up."
Turning on the lights
So how to light things up? Muller started with three
Muller also identified several areas in which further
research and development is needed. These include stream programming for GPUs,
programming solutions for manycore SoCs, design of energy-efficient on-chip
interconnect, and "near and subthreshold circuits" that can use energy
harvesting from heat and light already present in the environment.
Finally, Muller talked about Razor,
a dynamic voltage scaling technique developed by ARM that can dynamically
detect and correct timing errors. Razor tunes the supply voltage by monitoring
the error rate during circuit operation, supposedly eliminating the need for
voltage margins. Muller said Razor makes it possible to build a fault-tolerant
processor that can recover from "fast moving and transient" timing errors.
It's the system,
Muller concluded by noting something he learned in college -
"it's the system, stupid." If you really want to save power, he said, you first
have to think about where all the power goes. Muller noted that 300 million
motors worldwide will represent 7 percent of global carbon emissions by 2020.
Smart control can reduce motor power consumption by 25 to 40 percent.
"The important problem that faces all of us," Muller said,
"is to optimize the real system, which is the world in which we live."
Conference co-chair John Donovan
summarizes other parts of the virtual conference in a blog at the Low Power Design web site.