Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
System Development Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
This course combines our Allegro PCB Editor Basic Techniques, followed by Allegro PCB Editor Intermediate Techniques.
Virtuoso Analog Design Environment Verifier 16.7
Learn learn to perform requirements-driven analog verification using the Virtuoso ADE Verifier tool.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
Easier IP integration into systems-on-chip has been a long-sought goal, and is a key part of the EDA360 vision. In a Design Automation Conference interview, I learned how Sonics and Cadence are working together to provide an integration-optimized solution for AMBA interconnect IP.
Sonics, a provider of interconnect IP, offers SNAP, or Sonics Network for AMBA Protocol. This is a highly automated, low-cost tool that makes it easy to configure AMBA bus solutions. The SNAP architecture includes AHB master layers, AHB/APB slave branches, and an interconnect matrix. Cadence is reselling the SNAP IP as part of the company's new Open Integration Platform.
One interesting aspect of SNAP is its use of a cloud computing model. You can create a SNAP fabric from a client, and run an evaluation on a remote server. In the video clip below, Jack Browne, vice president of sales and marketing at Sonics, provides more information about Sonics, SNAP, the cloud computing capability, and how this all fits with EDA360.
If video fails to open, click here.
This video was taken right after Browne's presentation at the Cadence booth at DAC. In that presentation, Browne provided a short demonstration of SNAP on a small SoC. "We think the EDA360 program matches Sonics' vision for SoC design pretty closely," he said. With the SNAP focus on integration-optimized and verified IP, which is also a key tenet of EDA360, that appears to be the case.
Separately, Sonics and Cadence recently collaborated to optimize low-power IP integration for the wireless market. You can learn more about that effort, and watch a short video, here.