Cadence® system design and verification solutions, integrated under our System Development Suite, provide the simulation, acceleration, emulation, and management capabilities.
System Development Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
This course combines our Allegro PCB Editor Basic Techniques, followed by Allegro PCB Editor Intermediate Techniques.
Virtuoso Analog Design Environment Verifier 16.7
Learn learn to perform requirements-driven analog verification using the Virtuoso ADE Verifier tool.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technlogy. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
Get email delivery of the Cadence blog featured here
The 51st Design Automation Conference (DAC 2014) opens in San Francisco June 1 - and this year attendees will see a reorganized conference with several new tracks. Soha Hassoun, associate professor and chairman of the computer science department at Tufts University, is this year's DAC general chair. In this interview she talks about the new tracks, the keynote speeches, offerings for software developers, and expectations about exhibitors and attendance.
Q: Soha, what's new and exciting about DAC this year?
A: It's the 51st DAC this year, the beginning of a new half century for DAC. We are celebrating the past 50 years and looking forward to the next 50 years. We reorganized the tracks, and that is a reflection of where we see the conference going in the long run.
We have the traditional EDA track, we have an embedded systems and software track that has grown tremendously in the past few years, and we have the designer track. This year we added a new track on IP, which covers designing, integrating, and validating IP. We also added a track on security because it's becoming a major concern, and it needs to go hand in hand with other design considerations such as power and performance.
We also have a track that focuses on automobiles, which in terms of electronics are changing faster than we could blink. There's a lot of exciting research in this area. We've seen a little bit of a plateau in terms of pushing the abstraction level on design tools, and by focusing on various embedded systems and automobiles, we give people specific design cases. This is where designs are advancing and tools are being pulled along, and we are hoping this will benefit design automation in general.
Q: There are five keynotes this year. How were they chosen?
A: We actually have a keynote that goes with each track. For IP, we have a keynote by Hossein Yassaie, CEO of Imagination Technologies. For automotive, we have a dual keynote by Jim Tung, fellow at MathWorks, and James Buczkowski, technical fellow at Ford. For security, we have a keynote by Ernie Brickell, chief security architect at Intel.
The embedded track keynote will be given by Dr. Karim Arabi, vice president of engineering at Qualcomm. The EDA track keynote will be given by Dr. Cliff Hou, R&D vice president at TSMC.
Q: Like last year, the big three EDA CEOs are giving "visionary talks" before keynotes. Why this format?
A: We invited the CEOs to give visionary talks last year, and we had such positive comments from the audience that we thought it would be great to hear back from the CEOs about what problems they're working on and where they see the industry going. This year we have asked them specific questions on topics such as IP, security, and automotive.
Q: Why the focus on automobiles?
A: Automotive technology is moving very fast. If you bought a car two years ago and you go out and buy a car now, it's a totally different environment. It's all facilitated by the electronic components in the car, which are driven by the software architecture.
Q: Why did DAC add an IP track?
A: This was requested by some of our exhibitors. Many exhibitors do business in IP and SoCs. People are using IP regularly, so it seemed like a no-brainer to bring educational and research content into DAC.
Q: And what will the security track cover?
A: Anything from hardware security to software security. The idea is that you can't even talk about designing chips without security considerations. It's really motivated by where we think the industry is going in the next 5-10 years.
Q: You mentioned the embedded track. What is DAC offering for software developers this year?
A: We have a wide selection of offerings for embedded software developers. They include tutorials, panels, special sessions, and technical programs. These offerings examine basic issues such as coding techniques for reducing power consumption and programming on heterogeneous platforms. They also cover cutting-edge software design advances such as programming the Internet of Things, software certification and testing in automotive applications, and communication-aware programming.
Interested in knowing how industry experts view open-source embedded software? You can attend a panel on this topic and join in the discussion.
Q: What are your expectations in terms of exhibits and attendees?
A: We have roughly the same number of exhibitors we had before in San Francisco . We're looking at about 200 companies. I think we will have a very strong showing this year.
So far attendance looks strong, and we expect to meet or exceed DAC 2012.
Q: Finally, with so much information online, why is it beneficial to attend DAC in person?
A: DAC offers very unique networking opportunities. There's a reception every day at the end of the day Sunday through Thursday. Also, people who attend have a unique opportunity to ask questions in the sessions. With jam-packed days, and with so many technical presentations, you really get reinvigorated with new information.
Related Blog Posts
Cadence DAC 2014 and Denali Party Update
DAC 2014: Semiconductor IP Trends Revealed at "IP Talks!"
Free DAC Breakfast and Luncheons - Mixed Signal, Software Driven Verification, Cross-Fabric, and High-Performance Digital